CS 8803: Memory Models David Devecsery.

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Presentation transcript:

CS 8803: Memory Models David Devecsery

Shameless advertisement: Introductions Instructor: David Devecsery Assistant Professor: Computer Science Research Interests: Creating more reliable software Software Systems: Creating more reliable, and understandable systems Program Languages: Static/dynamic program analysis Contact: Email: ddevec@gatech.edu Office: 3338 KACB (Klaus) Website: https://www.cc.gatech.edu/~ddevecsery6/ Shameless advertisement: I’m looking for students!

Inclusive Classroom Goal: Every student to feel equally included Please let me know if you wish to go by a name not on the roster, or have pronoun preferences I make an active effort to keep my language, mannerisms, and policies unbiased. If anything feels offensive, or biased to you, please let me know! I want to fix it!

Goals of this course Goals: Learn background knowledge needed to do research in memory models Familiarized with current research in and around memory models Learn to actually do research on memory models

Parallel programming is hard! We all know how to write well-formed multi- threaded programs: Initial: m = unlocked, x = 0, y = 0 Thread 1: lock (m) x = 1 print y unlock(m) Thread 2: lock(m) y = 1 print x unlock(m)

Parallel programming is hard! What about improperly formed programs?: Initial: m1 = m2 = unlocked, x = y = 0 Initial: x = y = 0 Thread 1: lock (m1) x = 1 print y unlock(m1) Thread 2: lock(m2) y = 1 print x unlock(m2) Thread 1: x = 1 print y Thread 2: y = 1 print x

What is a memory model? How do you define memory model? (think both traditional, and more broadly)

What is a memory model? Definition I use: A memory model defines how parallel programs can observe shared data. Wording is broad: What types systems do you think need memory models?

Why is this important? Shared memory systems are growing: Heterogeneous architectures Multi-core PCs Datacenter-scale computing Processors w/ 100s of cores

Complexity of bugs is growing

What is the problem of memory models? At the most fundamental layer: How can we design intuitive and usable abstractions that enable parallel systems to share data efficiently, and reliably?

Why is this topic so unique? Memory Models are a full-stack problem: No single layer has a comprehensive solution

Outline Motivation Administration Introduction to memory models

Course Structure Graduate seminar: Research Project Wide array of topics I’ll present some background knowledge before readings Paper readings Expect 2-4 papers per week Written reviews Each student will lead the discussion for a paper Research Project

Course Structure Prerequisites Knowledge of threading fork, join, mutex, signal, wait Is the program to the right data-racy? Basic knowledge of computer architecture Pipeline processing Caching Basic knowledge of compilers Instruction reordering Initial: ready = false, a = null Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Grading • 10% – Attendance / Participation • 15% – Midterm • 15% – Paper Reviews • 10% – Presentations • 10% – Project Proposal • 5% – Project Progress Reports • 25% – Project Written Report • 10% – Project Presentation How well do I understand the fundamentals? How well do I understand the current research? Can I preform research in this area?

Midterm Held in class on Monday October 15th 15% of your grade Please ensure you can make this class Let me know as soon as possible if this date presents a problem 15% of your grade Significant, but not dominating! Class is about research, but you must understand fundamentals You’ll get practice problems to help you get a feel for the midterm Primarily focused on foundations of memory models

Readings and Reviews Read each assignment carefully and evaluate for novelty Paper reviews should include the following: Novelty and significance of research Contributions of paper Paper strengths / weaknesses Any ideas or thoughts you have after reading the paper Roughly 1 page in length Reviews will not be accepted after class in which paper is discussed But, I will drop 2 days of lowest reviews.

Quality of paper review insights Identifying interesting follow-on work Finding the fundamental observation that enabled this work ... Finding a fundamental flaw in the approach … Critiquing the evaluation Great Insights! … insights…

Project written reports will be due on December 5th 2018. Projects Project written reports will be due on December 5th 2018. Write it down! Will have a significant (9 week) research project Group project Begin thinking of ideas! Several project benchmarks Project Proposals: declare groups, present desired project Progress reports: periodic in-class reports, discussing progress on project Written report: Final write-up of project Project Presentation: 10 to 20 minute presentation of project

Paper Presentations Each student will be responsible for leading one in-class discussion Students are allowed/encouraged to use any available talk slides, however: They must prepare their own talking points They must be prepared to lead class discussions! Confererence talks typically 20 mins, 1 paper is 75/2 = 37.5 mins, you need to add ~15 minutes of discussion/material

Syllabus Quiz! Quiz on syllabus on Canvas Will be used to judge your attendance today Just to ensure you’re aware of all course policies Due on Sept 4th (4:30pm) Should retake until you get 100%

Course information Course website: http://classes.cc.gatech.edu/AY2019/cs8803fmm_fall/ Materials, slides, reading list, and calendar posted there Canvas: Review submission Syllabus Quiz (Don’t forget!) Office Hours and administration: No TAs for course Office hours will be held by appointment (email me to set them up).

Administration finale Let me know what interests you, this course can be flexible!

Outline Motivation Administration Introduction to memory models

Warning The material we’re about to cover is Confusing! I don’t expect you to master it today, we’ll be covering the mysteries behind these low-level memory models for a while! This is my first time presenting this material. If you feel like I haven’t represented something clearly, let me know.

Introduction to Memory Models Can this code have a null pointer exception? Initial: ready = false, a = null Answer: Maybe! (It depends on your memory model) Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Sequential Consistency (SC) [Lamport] “The result of an execution is the same as if the operations had been executed in the order specified by the program” Every operation on a thread happens before its successor e.g. Operations happen in “program order”

Introduction to Memory Models Can this code have a null pointer exception under sequential consistency? Initial: ready = false, a = null Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Answer: No Can this code have a null pointer exception under sequential consistency? Initial: ready = false, a = null Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5; Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Can this code have a null pointer exception under sequential consistency? Initial: ready = false, a = null Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5; Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models What can this code print under SC? Initial: a = 0, b = 0 Thread 1 a = 1 print b Thread 2 b = 1 print a

Introduction to Memory Models Can this code print 0, 0 under SC? Initial: a = 0, b = 0 Thread 1 a = 1 print b Thread 2 b = 1 print a Thread 1 a = 1 print b Thread 2 b = 1 print a Thread 1 a = 1 print b Thread 2 b = 1 print a

Introduction to Memory Models Total Store Ordering (TSO) [x86] There exists a total order for all stores Every store in a thread happens before the next store in that thread, and there is a total order for stores between threads

Introduction to Memory Models Can this code have a null pointer exception under TSO? Initial: ready = false, a = null Answer: No Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Can this code have a null pointer exception under TSO? Initial: ready = false, a = null Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5; Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Can this code have a null pointer exception under TSO? Reasoning: There is a Total Store Order, on thread 1! If ready reads true, a must have been assigned! Initial: ready = false, a = null Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Can this code print 0, 0 under TSO? Initial: a = 0, b = 0 Answer: Yes Thread 1 a = 1 print b Thread 2 b = 1 print a

Introduction to Memory Models Can this code have a null pointer exception under sequential consistency? Reasoning: There is a total order of stores, however the reads are not bounded by those stores (they can read before the stores complete!) Initial: a = 0, b = 0 Thread 1 a = 1 print b Thread 2 b = 1 print a

Introduction to Memory Models Can this code have a null pointer exception under TSO? Initial: a = null, ready = false Thread 1 a = new int[10]; Thread 2 while (a == null); ready1 = true; Thread 3 while (ready1 == false) ; print a[0]; Answer: No

Introduction to Memory Models Can this code have a null pointer exception under TSO? Initial: a = null, ready = false Thread 1 a = new int[10]; Thread 2 while (a == null); ready1 = true; Thread 3 while (ready1 == false) ; print a[0];

Introduction to Memory Models Reasoning: The while (… == 0) waits for a store to complete, any subsequent store on that thread is ordered by the store on the other thread! Can this code have a null pointer exception under TSO? Initial: a = null, ready = false Thread 1 a = new int[10]; Thread 2 while (a == null); ready1 = true; Thread 3 while (ready1 == false) ; print a[0];

Introduction to Memory Models Partial Consistency (PC) [x86] Stores to the same location are ordered Every store to a variable happens before the next store to that variable, but stores between variables are not ordered

Introduction to Memory Models Can this code have a null pointer exception under PC? Initial: a = null, ready = false Thread 1 a = new int[10]; Thread 2 while (a == null); ready1 = true; Thread 2 while (ready1 == false) ; print a[0]; Answer: Yes

Introduction to Memory Models Remember, ordering is based off each location Can this code have a null pointer exception under PC? Initial: a = null, ready = false Thread 1 a = new int[10]; Thread 2 while (a == null); ready1 = true; Thread 2 while (ready1 == false) ; print a[0];

Introduction to Memory Models Remember, ordering is based off each location Can this code have a null pointer exception under PC? Initial: a = null, ready = false Thread 1 a = new int[10]; Thread 2 while (a == null); ready1 = true; Thread 2 while (ready1 == false) ; print a[0];

Introduction to Memory Models Under which memory models can this segfault? Initial: ready = false, a = null Answer: PC Thread 1 a = new int[10]; ready = true; Thread 2 if (ready) a[5] = 5;

Introduction to Memory Models Hint: Think of using the synchronization to lock another variable: lock(x) y = 1 unlock (x) Hard question, spin locks on PC! Will this enforce mutual exclusion on a PC MM? Lock: do { tmp = dec(unlocked); if (tmp < 0) { while (unlocked <= 0) ; } } while (tmp < 0) Unlock unlocked = 1 Assume we have a dec operation: dec (x): atomic { tmp = x; tmp --; x = tmp; } return tmp;

Next class We’re going to start exploring why these models exist, and how we can actually program with them! We’ll answer our PC spinlock question! And more! Don’t forget the Syllabus Quiz!