Computer Evolution and Performance Chapter 2 Lecture 03 Faheem ahmad Lecturer, CNET Dept., Jazan University, Jazan KSA Computer Evolution and Performance

Objectives of this chapter In this chapter we will learn about History of computers, von-Neumann machines, IAS computer, Instruction word, memory formats, Instruction sets, Generations of computers, Bus structure, Design and performance. By the end of this chapter student will learn: Generations of computers. Stored program concept. Operations and different memory locations. Fetch – execute cycle.

ENIAC - background Electronic Numerical Integrator And Computer ENIAC It was the world’s first general purpose electronic digital computer. It is Started in 1943 and Finished in 1946.

ENIAC - details Decimal (not binary) Programmed manually by switches 18,000 vacuum tubes 30 tons of weight. 15,000 square feet in size. 140 kW power consumption 5,000 additions per second

von Neumann Machine This model is developed by a mathematician, John von Neumann, in the year 1946 completed in 1952 In this machine the concept used is “Stored Program” Data and program can be stored in the same space (memory). Thus, the machines it self can alter either its programs or its internal data.

von Neumann Machine Details Von Neumann machine have the following things: A main memory, which stores both data and instructions. An arithmetic and logic unit (ALU) capable of operating on binary data. A control unit, which interprets the instructions in memory and causes them to be executed. Input and output (I/O) equipment operated by the control unit. Control unit interpreting instructions from memory and executing

Structure of von Neumann machine

word The memory of the IAS consists of 1000 storage locations, called words, of 40 binary digits (bits) each. Both data and instructions are stored there. A word may also contain two 20-bit instructions, with an 8-bit operation code (opcode) and 12-bit address.

Structure Of IAS Computer In 1946 Von Neumann and his colleagues designed a new computer and referred it as IAS, which means Princeton Institute of Advance Studies. IAS is the expanded structure of von Neumann machine. The diagram consists of the following terms. MBR : Memory buffer register. MAR : Memory address register. IR : Instruction register. IBR : Instruction buffer register. PC : Program counter. AC : Accumulator. MQ : Multiplier Quotient.

Structure of IAS – detail

MBR: (Memory buffer register) contains a word to be stored in memory or sent to I/O unit MAR: (Memory address register) Specifies address in the memory of the word to be written from or read into MBR IR: (Instruction register) Contains 8-bit opcode instruction being executed IBR: (Instruction buffer register) Temporarily holds the right hand instruction from a word in memory PC: (Program counter) Contains the address of next instruction to be fetched from memory.

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