Preliminary tests and results on the TDC

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Presentation transcript:

Preliminary tests and results on the TDC PARISROC V2 Preliminary tests and results on the TDC

PARISROC2 TDC Principle: 2 Ramps recovery To ADC Memory cell X2 Memory cell X2 Multiplexor 1 channel Event Discriminator Ramp 1 and 2: global Memory Cell: individual

Analog and Digital Probes StartRamp1 and 2 StartRamp1, Ramp1 and 2

Simulation versus Reality Analog Probe Output (Scope view) Voltage span: [1.34 to 2.67] = 1.33 V Time span: [312ns to 448ns] = 136ns Voltage span: 1.39 V Time span: 137ns Recovery: 37ns

Ramp1 and Ramp2