Joshua Beaudet & Michael Klempa

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Presentation transcript:

Joshua Beaudet & Michael Klempa UNH-IOL SAS Test Tool Joshua Beaudet & Michael Klempa

Project Goals Create a tool using an FPGA for the UNH-IOL that connects to a SAS device Make it versatile for future testing

Practical Uses Testing a SAS drive or host’s state machines (SN, OOB, etc.) Golden Reference device

Design Inspiration

LeCroy Sierra M6-2 Advantages Disadvantages Established Software GUI Analyzer built in Disadvantages Crashes frequently Returns false data

Virtex 6

Virtex 6 Advantages Disadvantages Speed capabilities Robustness Versatility Abundant References Disadvantages Highly Complex infrastructure Fragile Unfamiliarity

Setup

Why VHDL? Robustness IEEE Standard Ubiquitous

SAS Referencing SAS 2.1 Rev. 7 Specification Serial Attached SCSI Enterprise Level Storage Technology 8b/10b encoding, differential NRZ signaling Focus: Establishing Link between two devices

OOB Definition: Out of band (OOB) signals are low-speed signal patterns that do not appear in normal data streams. OOB signals consist of defined amounts of idle time followed by defined amounts of burst time

OOB State Machine

OOB Demo

COMINIT & COMSAS COMINIT begins the OOB sequence COMSAS is used to show that the device is a SAS device

Speed Negotiation Goal: Find a commonly supported speed between two link partners Covers 6, 3, and 1.5G SAS Series of “Windows”

Speed Negotiation State Machine

Budget Item Cost Actual From Virtex 6 FPGA $5,000 $0 Xilinx SAS Drive $300 UNH IOL

Project Schedule

Questions?