SCADA – Data Processing Module E Ravi Teja 200001096 M Siva Suman 200001113 P Kiran 200001040 A Revanth 200001097 Ajay kumar Reddy 199901002

Agenda Review Work done till now Database Design Detailed Design ( DFD’s) Work Division Future Work

Review Digital to Engineering Conversion Zero Suppression Linear Non-Linear Piecewise Linear Zero Suppression Reasonability Check Limit Check

Work Done Finalized Database Design Created Database and populated with sample tuples Developed web interface for providing basic operations of the database like Insert Update Delete

Database Design Transducer Characteristics Digital and corresponding Engineering values Limit Specifications for Zero Suppression Reasonability checks Limit checks

Database Schema Digital To Engineering Zero suppression LitId Timestamp Digital Value Engineering Value Modified Zero suppression Reasonability check Limit check Characteristic function Type Minimum Maximum LitId Category

Database Schema(contd..) Transducer characteristics Linear Type A B Piecewise linear Type A B X 1 Y 2 Continuous Type An n

Initial System Design Characteristic Zero Converter function Category Converter Zero Suppression Engineering Value Digital Value Input Litid+DigVal Reasonability Check Database No Display Error Yes No Limit Check Display Output Yes

Detailed Design – DFDs – II 5. function Characteristic function Converter User 0. Submit event 2. LitId 6. EngVal 1. Input LitId+Digval Check 3. LitId 8. checked_value 4. function Database 7. Limits Converter DFD

1. insert(LitId, Timestamp, DigVal) AddNew DFD - II AddNew (Null checks) 0. LitId Timestamp DigVal User 1. insert(LitId, Timestamp, DigVal)

1. delete(LitId, Timestamp) Delete DFD – II Delete 0. LitId Timestamp User 1. delete(LitId, Timestamp)

1. Update(LitId, Timestamp, others..) Modify DFD – II Modify (Null checks) 0. LitId Timestamp Others.. User 1. Update(LitId, Timestamp, others..)

Work Division Database schema design Detailed design (All team members) Detailed design (Kiran and Ajay reddy) Web interface design and Query generation. (Revanth, Siva Suman and Ravi Teja)

Future Work Digital to Engineering Conversion Error checking mechanisms for Zero Suppression Reasonability checks Limit checks

Thank You Q & A