Logical Instructions And rd rs rt Nor rd rs rt Or rd rs rt

Slides:



Advertisements
Similar presentations
Integer Arithmetic: Multiply, Divide, and Bitwise Operations
Advertisements

Lecture 5: MIPS Instruction Set
CS/COE0447 Computer Organization & Assembly Language
Group Number One GITHU Processor Tom Bozic Ian Nuber Greg Ramsey Henry Romero Matt Unangst.
Lec 12Systems Architecture1 Systems Architecture Lecture 12: Design of the MIPS ALU Jeremy R. Johnson Anatole D. Ruslanov William M. Mongan Some or all.
Computer Architecture ECE 361 Lecture 6: ALU Design
1 Arithmetic and Logical Operations - Part I. Boolean Operations A boolean variable can only have one of the two values, i.e, can either be 1 or 0. Given.
Computer Structure - Computer Arithmetic Goal: Representing Numbers in Binary  Base 10 (decimal) - Numbers are represented using 10 numerals: 0, 1, 2,
EECS 362 Group 2: Kevin Cheung Michael Glowacki Alex Romine Dave Sexton.
1 Representing Numbers Using Bases Numbers in base 10 are called decimal numbers, they are composed of 10 numerals ( ספרות ) = 9* * *10.
Computer Architecture CPSC 321 E. J. Kim. Overview Logical Instructions Shifts.
CS61CL Machine Structures Lec 6 – Number Representation David Culler Electrical Engineering and Computer Sciences University of California, Berkeley.
Logical & shift ops (1) Fall 2007 Lecture 05: Logical Operations.
Lecture 5 Sept 14 Goals: Chapter 2 continued MIPS assembly language instruction formats translating c into MIPS - examples.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 6: Logic/Shift Instructions Partially adapted from Computer Organization and Design, 4.
Ch. 7 Bitwise Operations Comp Sci Bitwise operations.
ECM534 Advanced Computer Architecture
IT253: Computer Organization Lecture 5: Assembly Language and an Introduction to MIPS Tonga Institute of Higher Education.
Operand Addressing –No instruction for reg-to-reg transfer –Cannot do memory-memory transfers with single instruction –sw instruction violates (dest, source)
CSCI 136 Lab 1: 135 Review.
Chapter 10 The Assembly Process. What Assemblers Do Translates assembly language into machine code. Assigns addresses to all symbolic labels (variables.
Cs 152 l6 Multiply 1 DAP Fa 97 © U.C.B. ECE Computer Architecture Lecture Notes Multiply, Shift, Divide Shantanu Dutt Univ. of Illinois at.
MIPS Logic & Shift. Bitwise Logic Bitwise operations : logical operations applied to each bit Bitwise OR:
EET 4250 Instruction Representation & Formats Acknowledgements: Some slides and lecture notes for this course adapted from Prof. Mary Jane Penn.
MIPS Assembly Language Chapter 13 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 9 Binary Representation and Logical Operations.
CMPUT Computer Organization and Architecture I1 CMPUT229 - Fall 2003 Topic6: Logic, Multiply and Divide Operations José Nelson Amaral.
1 Arithmetic Where we've been: –Abstractions: Instruction Set Architecture Assembly Language and Machine Language What's up ahead: –Implementing the Architecture.
Pirouz Bazargan SabetDecember 2003 Effective Implementation of a 32-bit RISC Processor Pirouz Bazargan Sabet University of Paris 6 - LIP6 - ASIM
ECE 448 – FPGA and ASIC Design with VHDL George Mason University ECE 448 Lab 1 Implementing Combinational Logic in VHDL.
MIPS Arithmetic and Logic Instructions
CS Computer Organization Numbers and Instructions Dr. Stephen P. Carl.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Yaohang Li.
Lecture 8. MIPS Instructions #1 – Arithmetic and Logical Instructions Prof. Taeweon Suh Computer Science Education Korea University 2010 R&E Computer System.
Instructor: Prof. Hany H Ammar, LCSEE, WVU
COMPUTER ARCHITECTURE & OPERATIONS I
Computer Organization and Design Instruction Sets - 2
Computer Organization and Design Instruction Sets - 2
CS352H: Computer Systems Architecture
Computer Organization and Design Instruction Sets - 1
ALU Design: Shifter Details
Computer Organization and Design Instruction Sets
Team Brian Leslie Stephen Brenner Brian Leslie Ben Whitcher
Arithmetic Where we've been:
MISP Assembly.
How to represent signed integers
Computer Organization and Design Instruction Sets - 1
Systems Architecture I
Computer Architecture & Operations I
ECE232: Hardware Organization and Design
The University of Adelaide, School of Computer Science
Part II Instruction-Set Architecture
The University of Adelaide, School of Computer Science
MIPS Assembly.
Flow of Control -- Conditional branch instructions
Basic Building Blocks Multiplexer Demultiplexer Adder +
UCSD ECE 111 Prof. Farinaz Koushanfar Fall 2018
Team Stephen Brenner Brian Leslie Ben Whitcher
Computer Architecture EECS 361 Lecture 6: ALU Design
Logical instructions And rd rs rt Nor rd rs rt Or rd rs rt
Basic Building Blocks Multiplexer Demultiplexer Adder +
Computer Organization and Design Instruction Sets - 1
MIPS Assembly.
Flow of Control -- Conditional branch instructions
MIPS assembly.
Reduced Instruction Set Computer (RISC)
Instruction Sets, Episode 1
MIPS Arithmetic and Logic Instructions
MIPS Assembly.
MIPS Arithmetic and Logic Instructions
Presentation transcript:

Logical Instructions And rd rs rt Nor rd rs rt Or rd rs rt Xor rd rs rt Andi rt rs Imm Ori rt rs Imm Xori rt rs Imm Careful: Immediate variants Zero-extend

Logic Truth Tables AND A B C 1 NOR A B C 1 OR A B C 1 XOR A B C 1

How to Invert Each Bit? (One's complement) Nor rd rs $0 This is not! Nor fuction A B C 0 0 1 0 1 0 1 0 0 1 1 0 A 1 C=A' B=0

Shift Instructions Logical shift left Logical shift right A B C D lost lost B C D 0 0 A B C

Shift Instructions Arithmetic shift right A B C D lost A A B C

Shift Instructions Sll rd rt expr Sra rd rt expr Srl rd rt expr rd := rt shifted by expr (0..31) Sllv rd rt rs Srav rd rt rs Srlv rd rt rs rd := rt shifted by rs (variable)

Rotate Instructions Rotate left Rotate right A B C D A B C D B C D A