CMPE212 Discussion 11/21/2014 Patrick Sykes

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Presentation transcript:

CMPE212 Discussion 11/21/2014 Patrick Sykes Sequential Logic II CMPE212 Discussion 11/21/2014 Patrick Sykes

Other Flip Flops Can be built using D Flip Flop T Flip Flop Has a toggle input which indicates alternating or non-alternating state. T xor Q JK Flip Flop Combines input behavior of T Flip Flop and SR Latch J*notQ + notK*Q

Counters Each bit of the counter is associated with its own flip flop Can be designed synchronously, where all circuit elements are connected to a common clock. Can be asynchronous also. Where each circuit element can activate individually.

Synchronous Counter Let’s design

Asynchronous Counter Let’s design!