A microprocessor into a memory chip Dave Patterson, Berkeley, 1997 Intelligent RAM A microprocessor into a memory chip Dave Patterson, Berkeley, 1997

Context Distinct manufacturing lines Processor-Memory performance gap Memory wall Awkwardness of DRAM chips Time to unify logic and memory

Advantages Higher bandwidth and lower latency Less energy consumption Less distance (no bus) and less complexity Less energy consumption Less heat, better performance Costs efficient Save board space

Disadvantages Consequences on cost/bit and refresh rate Manufacturing challenges Reduce interchangeability ILP trade-off

VIRAM 2 2 2 2 2 2 2 2

Microarchitecture

Results Multiple operations can execute concurrently across parallel lanes High performance but Not efficient with short vectors Useless for non-vectorizable parallelism

Conclusion VIRAM / DIVA not real successes but implications in embedded systems Intel : Through Silicon Vias, personal technology to connect DRAM and processor First step to IRAM ?