A Time-Digital Converter (TDC) Harley Cumming Lisa Kotowski
Applications Time of Flight (High-Energy Physics) Mass Spectroscopy Medical Devices Laser Distance Meters (I.E. measuring the speed of light) Police Radar Guns Golf Range Finders
Theoretical Performance Measureable Time Scales: 100 ps 1 ns 10 ns 100 ns Minimize the delay times of each part (within reason of course)
Proposed Schematic 150MHz signal-drives FPGA Signal Generator-> “start” and “stop” pulses Run through a pair of BNC connectors to drive circuit Signal passes through (in order) 1 D-flipflop Voltage Ramp circuit (charges Capacitor) Stop Signal disables voltage ramp Secondary 3 D-flipflop (controlled by FPGA) 4 Voltage ramps Larger capacitor (charges slower)
D-flipflops
Input Voltage Ramp
Operating the TDC “start” and “stop” signals act as clock signal to the D-flipflops Drives the D-flip flops-> turn on voltage ramps Voltage ramps->charge capacitors Smallest cap. Attached to the input voltage ramp Capacitors take different times to charge: depending on the amount of charge on each capacitor a measurement of time can be made. -> FPGA counts/measures the signal
Timeline: (Before Next Thrusday) Finalize circuit design Order Parts/ Print board Receive parts/board in mail Solder the board Test the board Done!
Possible Challenges/Setback Time! Writing the FPGA firmware Order a PCB and all parts Solder all the parts to the board Might not be able to create a PCB Have a SMT breadboard as backup! Testing Might not work according to plan…
Questions?