Backend Readout Electronics CSPEC Detector Kick-off Workshop 18th January 2019 Steven Alcock, Detector Group

Contents Explain the design objectives for the backend readout electronics. Report progress and review delivery schedule. Steven Alcock, Detector Group, 18th January 2019

What Is Backend Electronics? Front End analog electronics (preamps, shapers) terminated at some form of Analog to Digital Converter (ADC). Front End digital electronics required to interface with ADCs: Clocking/timing, Configuration/control, Sample processing. A given instrument may require large numbers of ADCs. Backend digital electronics is required to coordinate the timing, control and data paths between these ADCs and the ICS/DMSC. All ESS instruments will have a common backend. Steven Alcock, Detector Group, 18th January 2019

ICS (timing/slow control) Readout Architecture ICS (timing/slow control) DMSC (science data) Backend Master Internal Routing MFE ICS MFE DMSC MFE MFE MFE MFE FEA FEA FEA FEA FEA FEA FEA FEA FEA FEE FEE FEE FEE FEE FEE FEE FEE FEE ADC ADC ADC ADC ADC ADC ADC ADC ADC … … … … … … … … … Detector Channels Steven Alcock, Detector Group, 18th January 2019

Scope of Roles ESS Engineers: Scott Kolya – system architect. Steven Alcock – In-Kind facilitator, integration and acceptance testing. STFC Engineers: John Coughlan (replacement for Isa Uzun) – management of STFC resources. Harry Walton – front end ring communication development. Nauman Iqbal – backend DMSC communication development. Maged Sallam – slow control development. Steven Alcock, Detector Group, 18th January 2019

Progress As reported at IKON15, a stripped down end-to-end readout demonstrator exists: we can get data from an FEA to a NIC via the FPGA master. Most of the major challenges have been solved, but not: ICS Time Distribution to Backend Master, Front End Integration. It will also be necessary to perform extensive testing, with new design iterations as required. Steven Alcock, Detector Group, 18th January 2019

Roadmap The first iteration of a deployable backend readout is expected by October 2019, but this does not include front end integration. In-Kind runs until March 2020. The work MUST be completed and handed over by STFC then. CPSEC-specific integration starts after a full readout system is available. This work must be completed before June 2020. Backend readout allocation includes resources for this effort – this is 200k EUR already in the CSPEC budget. After the end of the In-Kind, additional effort will be sourced from within ESS – this will be a cross-project allocation possibly requiring additional recruitment. Steven Alcock, Detector Group, 18th January 2019

Questions