Circuit Analysis Procedure by Dr. M

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Presentation transcript:

Circuit Analysis Procedure by Dr. M Circuit Analysis Procedure by Dr.M.Manikandan Associate Professor Dept. of Electronics Engg. Anna University. Give qualifications of instructors: DAP teaching computer architecture at Berkeley since 1977 Co-athor of textbook used in class Best known for being one of pioneers of RISC currently author of article on future of microprocessors in SciAm Sept 1995 RY took 152 as student, TAed 152,instructor in 152 undergrad and grad work at Berkeley joined NextGen to design fact 80x86 microprocessors one of architects of UltraSPARC fastest SPARC mper shipping this Fall

Overview Important concept – analyze digital circuits Given a circuit Create a truth table Create a minimized circuit credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

Overview Approaches Boolean expression approach Truth table approach Leads to minimized hardware Provides insights on how to design hardware credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

The Problem How can we convert from a circuit drawing to an equation or truth table? Two approaches Create intermediate equations Create intermediate truth tables

The Problem A B C Out A B C’

Label Gate Outputs Label all gate outputs that are a function of input variables. Label gates that are a function of input variables and previously labeled gates. Repeat process until all outputs are labelled.

Label Gate Outputs A R B C Out T A S B C’

Approach 1: Create Intermediate Equations Step 1: Create an equation for each gate output based on its input. R = ABC S = A + B T = C’S Out = R + T

Approach 1: Create Intermediate Equations B C Out T A S B C’

Approach 1: Substitute in subexpressions Step 2: Form a relationship based on input variables (A, B, C) R = ABC S = A + B T = C’S = C’(A + B) Out = R+T = ABC + C’(A+B)

Approach 1: Substitute in subexpressions Out T A S B C’

Approach 1: Substitute in subexpressions Step 3: Expand equation to SOP final result Out = ABC + C’(A+B) = ABC + AC’ + BC’ Out

Approach 1: Substitute in subexpressions Out A C’ B C’

Approach 2: Truth Table Step 1: Determine outputs for functions of input variables. A 1 B 1 C 1 R 1 S 1

Approach 2: Truth Table A R B C Out T A S B C’

Approach 2: Truth Table Step 2: Determine outputs for functions of intermediate variables. A 1 B C R S T C’ T = S * C’

Approach 2: Truth Table A R B C Out T A S B C’

Approach 2: Truth Table R + T = Out Step 3: Determine outputs for function. A 1 B C R S T Out R + T = Out

Approach 2: Truth Table A R B C Out T A S B C’

More Difficult Example Step 3: Note labels on interior nodes Logic Diagram for Analysis Example

More Difficult Example: Truth Table Remember to determine intermediate variables starting from the inputs. When all inputs determined for a gate, determine output. The truth table can be reduced using K-maps.

More Difficult Example: Truth Table 1 B C F2 F’2 T1 T2 T3 F1

Summary Important to be able to convert circuits into truth table and equation form WHY? ---- leads to minimized sum of product representation credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

Summary Two approaches illustrated Approach 1: Create an equation with circuit output dependent on circuit inputs Approach 2: Create a truth table which shows relationship between circuit inputs and circuit outputs credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

Summary Both results can then be minimized using K-maps. Next time: develop a minimized SOP representation from a high level description credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.