5.5. Fundamentals of low-noise design

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5.5. Fundamentals of low-noise design 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design 5.5. Fundamentals of low-noise design hgygygygo

5.5.1. Junction-diode noise model 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.1. Junction-diode noise model 5.5.1. Junction-diode noise model ID 1) iD = IF - IS = IS e - IS VD /VT 2) idsh2 = 2 q ( IF + IS ) = 2 q ( ID + 2IS )  2 q ID rd idsh ID 3) rd  k T q ID idf idf rd 4) idsh2 = 2 q ID = 2 k T / rd rd ID edsh 5) edsh2 = (2 k T / rd ) rd 2 = 2 k T rd hgygygygo At low frequencies and ID >> IS , idn2 = 2 q ID + Kf ID f , K = 2 q ff Note that dynamic resistances do not generate any noise since them dissipate no power, vd id = 0.

5.5.2. BJT noise model icsh2 = 2 q IC ibsh2 = 2 q IB vbt2 = 4 k T rb 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model 5.5.2. BJT noise model C Noiseless rb vbt B icsh ibf ibsh E icsh2 = 2 q IC ibsh2 = 2 q IB vbt2 = 4 k T rb ibf 2 = 2 q IB + Kf IB f , Kf = 2 q ff hgygygygo

vn s(t) = vst(t) + vbt(t) + [ibf (t) + ibsh(t)](RS + rb) + icsh(t) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model A. Total input noise vs RS rb vbt vbt B ip C hfe ip ic icsh vn s ? rp ro ibf ibsh 1) Total input noise vs. time, vn s(t). vn s(t) = vst(t) + vbt(t) + [ibf (t) + ibsh(t)](RS + rb) + icsh(t) RS+rb+rp hfe hgygygygo 2) Power spectral density of the total input noise, vn s2( f ).

vn s(t) = vst(t) + vbt(t) + [ibf (t) + ibsh(t)](RS + rb) + icsh(t) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model A. Total input noise vn s RS rb vbt vbt B ip C hfe ip ic vs icsh vn s ? rp ro ibf ibsh 1) Total input noise vs. time, vn s(t). vn s(t) = vst(t) + vbt(t) + [ibf (t) + ibsh(t)](RS + rb) + icsh(t) RS+rb+rp hfe hgygygygo 2) Power spectral density of the total input noise, vn s2( f ). vn s2 = 4 k T (rb + RS) + (ibf 2 + ibsh2)(RS + rb) 2 + icsh2 RS+rb+rp hfe 2

vn s2 = 4 k T (rb + RS) + (ibf 2 + ibsh2)(RS + rb) 2 + icsh2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model B. Optimum collector current vn s RS rb vbt B ip C hfe ip ic rp ro RC RS+rb+rp hfe 2 vn s2 = 4 k T (rb + RS) + (ibf 2 + ibsh2)(RS + rb) 2 + icsh2 hgygygygo vn s2 = 4 k T (rb + RS) + 2 q IC rb2 hfe + 2 q IC rb+hfeVT / IC 2 IC opt = hfeVT (1 + hfe )0.5 rb2

vn s2 = 4 k T (rb + RS) + (ibf 2 + ibsh2)(RS + rb)2 + icsh2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model C. vn- in noise model RS en rb B ip C hfe ip ic vs in rp ro RC RS+rb+rp hfe 2 vn s2 = 4 k T (rb + RS) + (ibf 2 + ibsh2)(RS + rb)2 + icsh2 hgygygygo en2 = vn s2 = 4 k T rb + (ibf 2 + ibsh2) rb2 + icsh2 rb+rp hfe 2 Rs= 0 in2 = = ibf 2 + ibsh2 + vn s2 Rs2 Rs=  icsh2 hfe2

vn2 = 4 k T rb + (ibf 2 + ibsh2) rb2 + icsh2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model BJT vn- in noise model f >> ff rb = 100 W IC = 1 mA hfe = 100 vn = 1.36 nV/Hz0.5 in = 1.8 pA/Hz0.5 vn / in = 756 W C vn in B E hgygygygo rb+rp hfe 2 vn2 = 4 k T rb + (ibf 2 + ibsh2) rb2 + icsh2 icsh2 hfe2 in2 = ibf 2 + ibsh2 +

en2 = vn s2 = vbt2 + (ibf 2 + ibsh2) rb2 + icsh2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.2. BJT noise model D. Optimum source resistance RS en rb B ip C hfe ip ic vs rp ro RC in rb+rp hfe 2 en2 = vn s2 = vbt2 + (ibf 2 + ibsh2) rb2 + icsh2 Rs= 0 en s2 Rs2 icsh2 hfe2 hgygygygo Rs=  in2 = = ibf 2 + ibsh2 + Rs opt = vn s in IC opt = rb 2  1 +  1+hfe

5.4.3. JFET noise model igsh2 = 2 q IG idt2 = 4 k T (2/3)gm idf 2 = 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.3. JFET noise model 5.4.3. JFET noise model D Noiseless G idf idt igsh S igsh2 = 2 q IG idt2 = 4 k T (2/3)gm idf 2 = Kf ID f , Kf = 2 q ff hgygygygo

1) Total input noise vs. time, vn s(t). 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.3. JFET noise model A. Total input noise gmvgs vs RS G ig D id RC vn s ? ro 1/gm igsh idf idt 1) Total input noise vs. time, vn s(t). hgygygygo

vn s(t) = vst + igsh(t) RS + [idf (t) + idt(t)]/gm 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.3. JFET noise model A. Total input noise vs RS igsh Rs gmvgs G ig D id vn s ? ro RC 1/gm igsh idf idt 1) Total input noise vs. time, vn s(t). vn s(t) = vst + igsh(t) RS + [idf (t) + idt(t)]/gm hgygygygo 2) Power spectral density of the total input noise, vn s2( f ). vn s2 = 4 k T RS + igsh2RS2 + (idf 2+ idt2)/gm2

vn s(t) = vst + igsh(t) RS + [idf (t) + idt(t)]/gm 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.3. JFET noise model A. Total input noise vn s vs RS igsh Rs gmvgs G ig D id vn s ? ro RC 1/gm idf idt 1) Total input noise vs. time, vn s(t). vn s(t) = vst + igsh(t) RS + [idf (t) + idt(t)]/gm hgygygygo 2) Power spectral density of the total input noise, vn s2( f ). vn s2 = 4 k T RS + igsh2RS2 + (idf 2+ idt2)/gm2

vn s2 = 4 k T RS + igsh2RS2 + (idf 2+ idt2)/gm2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.3. JFET noise model B. vn- in noise model vn s gmvgs en in RS igsh Rs G ig D id vs vn s ? ro RC 1/gm idf idt vn s2 = 4 k T RS + igsh2RS2 + (idf 2+ idt2)/gm2 en2 = vn s2 = (idf 2+ idt2)/gm2 Rs= 0 hgygygygo in2 = = igsh2 vn s2 Rs2 Rs= 

vn2 = (idf 2+ idt2)/gm2 in2 = igsh2 JFET vn- in noise model 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.3. JFET noise model JFET vn- in noise model f >> ff Vp = 2 V IDSS = 10 mA IG = 10 pA vn = 1.8 nV/Hz0.5 in = 1.8 fA/Hz0.5 vn /in = 1 MW RS = 1 MW in RS = 1.8 nV/Hz0.5 D vn in G S hgygygygo vn2 = (idf 2+ idt2)/gm2 in2 = igsh2

5.5.4. MOSFET noise model idt2 = 4 k T (2/3)gm Kf ID f idf 2 = 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.4. MOSFET noise model 5.5.4. MOSFET noise model D Noiseless G idt idf S idt2 = 4 k T (2/3)gm idf 2 = Kf ID f , Kf = 2 q ff hgygygygo

vn s(t) = vst(t) + [idf (t) + idt(t)]/gm 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.4. MOSFET noise model A. Total input noise gmvgs vs RS G D id RC vn s ? ro 1/gm idf idt 1) Total input noise vs. time, vn s(t). vn s(t) = vst(t) + [idf (t) + idt(t)]/gm hgygygygo 2) Power spectral density of the total input noise, vn s2( f ). vn s2 = 4 k T RS + (idf 2+ idt2)/gm2

vn s(t) = vst(t) + [idf (t) + idt(t)]/gm 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.4. MOSFET noise model A. Total input noise vn s gmvgs vs RS G D id RC vn s ? ro 1/gm idf idt 1) Total input noise vs. time, vn s(t). vn s(t) = vst(t) + [idf (t) + idt(t)]/gm hgygygygo 2) Power spectral density of the total input noise, vn s2( f ). vn s2 = 4 k T RS + (idf 2+ idt2)/gm2

vn s2 = 4 k T RS + (idf 2 + idt2)/gm2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.4. MOSFET noise model B. vn- in noise model vn s gmvgs en in RS G D id vs ro RC 1/gm vn s2 = 4 k T RS + (idf 2 + idt2)/gm2 en2 = vn s2 = (idf 2+ idt2)/gm2 Rs= 0 hgygygygo in2 = = 0 vn s2 Rs2 Rs= 

MOSFET vn- in noise model 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.4. MOSFET noise model MOSFET vn- in noise model f >> ff Vp = 2 V IDSS = 10 mA vn = 1.8 nV/Hz0.5 D vn G S vn2 = (idf 2+ idt2)/gm2 hgygygygo in = 0

5.5.5. Frequency response effect 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect 5.5.5. Frequency response effect The aim is to analyze the dependence of a transistor en and in on frequency and operating point. VCC iC RS vs VBB Cm hgygygygo RS rb vbt vbt B C hfe ip ic vs Cp ip icsh rp ro ibf ibsh

___ iC vs hfe [1/j 2pf (Cp+Cm )]/[rp+1/j 2pf (Cp+Cm )] 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect A. Total input noise Cm RS rb B is C vn s hfe ip ic vs Cp ip rp ro 1) Transconductance gain, Ag. hgygygygo iC vs hfe [1/j 2pf (Cp+Cm )]/[rp+1/j 2pf (Cp+Cm )] RS + rb+rpII[1/j 2pf (Cp+Cm )] Ag  ___ = ____________________________________ is= 1 hfe /(RS +rb+rp ) 1+j 2pft = _____________ , t = [(RS + rb)IIrp ](Cp+Cm )

t = [(RS + rb)IIrp ](Cp+Cm ) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect Cm RS rb vbt vbt B C hfe ip ic vs Cp ip icsh vn s rp ro ibf ibsh hfe /(RS +rb+rp ) 1+j 2pft Ag = _____________ , t = [(RS + rb)IIrp ](Cp+Cm ) 2) Power spectral density of the total input noise, vn s2( f ). hgygygygo RS +rb+rp hfe 2 vn s2 = 4 k T (RS +rb) + (ibf 2 + ibsh2) rb2 + icsh2 [1+ (2pft)2]

vn s2 = 4 k T (RS +rb) + (ibf 2 + ibsh2) (RS+rb)2 + icsh2 [1+ (2pft)2] 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect RS +rb+rp hfe 2 vn s2 = 4 k T (RS +rb) + (ibf 2 + ibsh2) (RS+rb)2 + icsh2 [1+ (2pft)2] 3) en and in of the transistor. rb+rp hfe 2 en2 = vn s2 = 4 k T rb + (ibf 2 + ibsh2) rb2 + icsh2 [1+ (2pften)2] Rs= 0 ten = (rbIIrp )(Cp+Cm ) hgygygygo vn s2 Rs2 icsh2 hfe2 Rs=  in2 = = ibf 2 + ibsh2 + [1+ (2pftin)2] tin = rp (Cp+Cm )

en2 = vn s2 = 4 k T rb+ (ibf 2 + ibsh2) rb2 + icsh2 [1+ (2pften)2] 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect B. vn- in noise model for high-frequencies Cm RS en in rb B C hfe ip ic vs Cp ip vn s rp ro rb+rp hfe 2 en2 = vn s2 = 4 k T rb+ (ibf 2 + ibsh2) rb2 + icsh2 [1+ (2pften)2] Rs= 0 hgygygygo vn s2 Rs2 icsh2 hfe2 Rs=  in2 = = ibf 2 + ibsh2 + [1+ (2pftin)2]

____ rb+rp hfe 2 en2 = vn s2 = 4 k T rb+ (ibf 2 + ibsh2) rb2 + icsh2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect C. en( f ) for different IC rb+rp hfe 2 en2 = vn s2 = 4 k T rb+ (ibf 2 + ibsh2) rb2 + icsh2 [1+ (2pften)2] Rs= 0 101 103 105 108 100 102 104 106 109 107 -40 -20 2 4 1 3 5 f, Hz IC opt = 24 mA IC = 0.1 mA en( f ) nV/Hz0.5 hgygygygo rb = 100 W hfe = 100 Cm = 1 pF Cp (1 mA) = 100 pF Ag Ag max dB ____

____ vn s2 icsh2 Rs2 hfe2 in2 = = ibf 2 + ibsh2 + [1+ (2pftin)2] 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect D. in( f ) for different IC vn s2 Rs2 icsh2 hfe2 Rs=  in2 = = ibf 2 + ibsh2 + [1+ (2pftin)2] 2 6 4 8 IC opt = 24 mA IC = 0.1 mA in( f ) pA/Hz0.5 hgygygygo 100 101 102 103 104 105 106 107 108 109 -40 -20 rb = 100 W hfe = 100 Cm = 1 pF Cp (1 mA) = 100 pF Ag Ag max dB ____ 100 101 102 103 104 105 106 107 108 109 f, Hz

E. Noise simulation in PSPICE 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect E. Noise simulation in PSPICE V(INOISE)*1G 30 V(ONOISE)*1G/10 20 V(Out1)/V(V1:+)/10 10 hgygygygo 1.0Hz 10KHz 100MHz 1.0THz Frequency

5.5.6. Comparison of the BJT, JFET and MOSFET 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.6. Comparison of the BJT, JFET and MOSFET 5.5.6. Comparison of the BJT, JFET and MOSFET rb = 40 W hfe = 500 ro =  IC = 1 mA IDSS = 2 mA Vp = 2 V ID = 1 mA vn s2 = 4 k T RS + igsh2RS2 + (idf 2+ idt2)/gm2 vn s2 = 4 k T (rb + RS) + (ibf 2 + ibsh2)(RS + rb)2 + icsh2 RS+rb+rp hfe 2 vn s2 = 4 k T RS + (idf 2+ idt2)/gm2 hgygygygo

Power spectral density of the total input noise vn s2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.6. Comparison of the BJT, JFET and MOSFET 100 Power spectral density of the total input noise vn s2 as a function of RS IC opt vn s nV/Hz0.5 5 The 1/f noise is neglected. hgygygygo The JFET gate current is neglected. 1 102 103 104 105 RS, W

Guide for selection of the preamplifier 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.6. Comparison of the BJT, JFET and MOSFET MOSFET Guide for selection of the preamplifier JFET IC amplifiers BJT Transformer coupling hgygygygo 1 10 100 1 k 10 k 100 k 1 M 10 M 100 M 1 G 10 G 100 G Source resistance, RS Reference: [9]

Example: Comparison of an BJT and JFET in PSPICE 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.5. Frequency response effect Example: Comparison of an BJT and JFET in PSPICE Rs = 100 W Rs = 10 kW hgygygygo

5.5.7 Noise analysis of a CE amplifier 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit 5.5.7 Noise analysis of a CE amplifier VCC RC RS vs RE VBB rp io hfe ip ro rb RE RC B E C icsh vs RS ibf ibsh ip vet vbt vst ro   hgygygygo

Our final aim is to find and minimize the total input noise vn s. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit Our final aim is to find and minimize the total input noise vn s. rb vbt B C hfe ip ip io icsh rp vst ibf ibsh RS E vet vet vs vn s ? RE RC hgygygygo Let us first find vn s by applying superposition.

1+hfe RE/(RE +RS+rb+rp) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit 1) Signal gain As for vs, vst, vbt, and vet. rb vbt B C hfe ip ip io rp vst RS E vet vs RE RC hgygygygo As  = Gs + Gs bs fwd AOL 1+AOLb _______ io vs ___ As = 1 RS+rb+rp+RE ___________ hfe 1+hfe RE/(RE +RS+rb+rp) ____________________ + 0

1+hfe RE/(RE +RS+rb+rp) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit 2) Noise gain Abf for ibf and ibsh. rb B C hfe ip ip io rp ibf ibsh RS E vs RE RC hgygygygo Abf  = Gibf + Gbf bbf fwd AOL 1+AOLb _______ io ibf ___ Abf = RS+rb+RE RS+rb+RE +rp ___________ hfe 1+hfe RE/(RE +RS+rb+rp) ____________________ + 0

1+hfe RE/(RE +RS+rb+rp) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit 3) Noise gain Acsh for icsh. rb B C hfe ip ip io icsh rp RS E vs RE RC hgygygygo Acsh  = Gcsh + Gcsh bcsh fwd AOL 1+AOLb _______ io icsh ___ Acsh = RE RE +RS+rb+rp - ___________ hfe 1+hfe RE/(RE +RS+rb+rp) ____________________ + 1

_______ ___ ___ Act  = Gcsh + Gct bct fwd AOL 1+AOLb io ict Acsh = 1 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit 4) Noise gain Act for icsh. rb B C hfe ip ip io rp RS E vet vs RE RC hgygygygo Act  = Gcsh + Gct bct fwd AOL 1+AOLb _______ io ict ___ Acsh = 1 RC ___

__________ _______ _____ ________ _____ RSbE =RS+rb+RE 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. 5.5.7. Example circuit 5) Total input noise vs. time, vn s. rb B C hfe ip ip io rp RS vn s E vs RE RC RSbE =RS+rb+RE hgygygygo vn s(t) = vst +vbt +vet (ibf +ibsh) Abf As __________ + icsh Acsh _______ vct Act _____ vn s2( f ) = 4kT RSbE+(ibf 2+ibsh2) RSbE2 (RSbE+rp)2 hfe2 ________ + icsh2 + 4kT 1 RC As2 _____  0

en2 = en s2 = 4 k T RbE + (ibf 2 + ibsh2) RbE 2 + icsh2 (RbE+rp)2 hfe2 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 6) Vn- In noise model. vn in rb B C hfe ip ic ip rp RC RE E RS E vs (1+hfe) RE RbE = rb + RE hgygygygo en2 = en s2 = 4 k T RbE + (ibf 2 + ibsh2) RbE 2 + icsh2 (RbE+rp)2 hfe2 Rs= 0 in2 = = ibf 2 + ibsh2 + icsh2 hfe2 en s2 Rs2 Rs= 

RSbE2 hfe RSbE +hfeVT / IC hfe 2 vn s2 = 4 k T RSbE + 2 q IC + 2 q IC 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 7) Minimizing CE noise. 102 -0.5 -0.4 -0.3 -0.2 -0.1 103 104 en s norm. dB hfe 0.1 0.2 0.4 0.8 1.4 10 hfe=104 hfe=102 hfe=103 IC / IC opt en s norm. dB 1.0 0.6 1.2 rb = 100 RS = 200 RE = 200 ibf 2 = 0 vbt2 = 4 k T rb vet2 = 4 k T RE ibsh2 = 2 q IC /b icsh2 = 2 q IC RSbE2 hfe RSbE +hfeVT / IC hfe 2 vn s2 = 4 k T RSbE + 2 q IC + 2 q IC hgygygygo IC opt = hfeVT (1 + hfe )0.5 R*2 vn s min2 = 4 k T RSbE (1 + hfe )0.5 (1 + hfe )0.5-1

Next lecture Appendix: Noise analysis of the CE without applications of superposition

Noise analysis of a CE amplifier 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis Noise analysis of a CE amplifier VCC RC RS vs RE VBB rp ic hfe ip ro rb RE RC B E C icsh vn s ? vs RS ibf ibsh ip vet vbst hgygygygo

1) Disconnecting ibf and ibsh sources. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 1) Disconnecting ibf and ibsh sources. rb vbst B ip C hfe ip ic ? ibf ibsh icsh rp ro RC ibf ibsh vn s RS E vet vs RE hgygygygo

1) Disconnecting ibf and ibsh sources. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 1) Disconnecting ibf and ibsh sources. rb vbst B ip C hfe ip ic ? icsh ibf ibsh rp ro RC vn s RS ibf ibsh E vne = vet - (ibf + ibsh) RE vet vs RE hgygygygo

1) Disconnecting ibf and ibsh sources. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 1) Disconnecting ibf and ibsh sources. vbst + (ibf + ibsh) (Rs + rb) rb vbst B ip C hfe ip ic ibf ibsh ip ? icsh rp ro RC vn s RS E vne = vet - (ibf + ibsh) RE vet vs RE hgygygygo

2) Disconnecting ibf and ibsh sources. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 2) Disconnecting ibf and ibsh sources. rb vbst + (ibf + ibsh) (Rs + rb) B ro   C hfe ip ic ip ? icsh rp ro RC vn s RS E vet vne = vet - (ibf + ibsh) RE vs RE hgygygygo

2) Disconnecting ibf and ibsh sources. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 2) Disconnecting ibf and ibsh sources. rb vbst + (ibf + ibsh) (Rs + rb) B C hfe ip ic ip ? icsh rp RC vn s RS E vne = vet - (ibf + ibsh) RE vet vs RE hgygygygo

2) Disconnecting ibf and ibsh sources. 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 2) Disconnecting ibf and ibsh sources. rb vbst + (ibf + ibsh) (Rs + rb) B C hfe ip ic ip ? icsh rp RC vn s RS E vne = vet - (ibf + ibsh) RE vet vne = vet - (ibf + ibsh) RE + icsh RE vs (1+hfe) RE RE hgygygygo

vn s(t) = vbst(t) - vet(t) + [ibf (t) + ibsh(t)] R* + ? 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 3) Reflecting ibf and ibsh to vn s. rb vbst + (ibf + ibsh) (Rs + rb) B C hfe ip ic ip ? icsh rp RC vn s RS E vne = vet - (ibf + ibsh) RE + icsh RE vs (1+hfe) RE R* = RS + rb + RE hgygygygo vn s(t) = ic(t) RS+rb+rp+(1+hfe)RE hfe vn s(t) = vbst(t) - vet(t) + [ibf (t) + ibsh(t)] R* + ?

R* = RS + rb + RE 1) vn s = - ic(t) , RS+rb+rp+(1+hfe)RE hfe 2) ic = 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 3) Reflecting icsh to vn s. rb B C hfe ip ic ip ? icsh rp RC vn s RS E icsc RE vs (1+hfe) RE R* = RS + rb + RE hgygygygo 1) vn s = - ic(t) , RS+rb+rp+(1+hfe)RE hfe 2) ic = hfe RS+rb+rp+(1+hfe)RE + icsh (t) - icsh (t) RE 3) vn s = - icsh (t) RE + icsh (t) RS+rb+rp+(1+hfe)RE hfe = icsh (t) R* + rp hfe

vn s(t) = vbst(t) - vet(t) + [ibf (t) + ibsh(t)] R* + icsh (t) R*+ rp 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 4) Total input noise vs. time, vn s(t). rb B C hfe ip ic ip rp RC vn s RS E vs (1+hfe) RE R* = RS + rb + RE hgygygygo vn s(t) = vbst(t) - vet(t) + [ibf (t) + ibsh(t)] R* + icsh (t) R*+ rp hfe

vn s(t) = vbst(t) - vet(t) + [ibf (t) + ibsh(t)] R* + icsh (t) 5. SOURCES OF ERRORS. 5.5. Fundamentals of low-noise design. Appendix: conventional noise analysis 5) Power spectral density of the total input noise, vn s2. rb B C hfe ip ic ip rp RC vn s RE E RS E vs (1+hfe) RE R* = RS + rb + RE hgygygygo R*+ rp hfe vn s(t) = vbst(t) - vet(t) + [ibf (t) + ibsh(t)] R* + icsh (t) vn s2 = 4 k T R* + (ibf 2 + ibsh2) R* 2 + icsh2 R*+ rp hfe 2

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