2A8 DRC with Deep Networks Paul Franzon, Rhett Davis, Dror Baron The design rule check (DRC) problem is getting too complex as the number of rules increases. The process takes a long time and needs an interactive DRC. In this project, we explore the feasibility of using machine learning to the DRC problem. In year 2, we will investigate link with yield monitors. All work will be done with NCSU15 nm PDK. Problem Statement Project Objectives Demonstrate that DRC can be done with trained ML models Based on extracted features Experiment with different networks Increase amount of data After success with training Expand rule set to full 15 nm PDK Investigate connection to yield monitor data In year 2: Investigate deriving rules from yield monitor data, OR Investigate driving semi-automated layout Took ~50 SRAM desgins from class project Laid out in 15 nm PDK Gds files of layouts are converted to gdt. 200 variants of each gdt file are generated by randomly changing the widths of M1 metal boundaries. These gdt files are then used to generate images. Each layout is also passed through Calibre DRC tool, to obtain a result-file that lists the locations of DRC violations, labled by an error mask Trained two layer network with 20,000 images Very quick to train Achieved 80% success rate on retained data Proof of Concept Technical Approach Year 1: Work on extracted features, not raw pixelated image data E.g. layout shape coordinates Greatly reduces data set size Likely to increase success rate Increase training set Investigate different networks and parameters Extend to other rules Year 2: Investigate connection to yield monitors Train same networks from yield monitors, instead of labelled DRC rules OR Investigate driving layout Treat layout as a parameterized model Original Layout Variation #1 Variation #2 Layout Error Mask Future Scope New paradigm for DFM management