Reciprocal capacitance transients

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Presentation transcript:

Reciprocal capacitance transients Reciprocal capacitance transients?   Tim Gfroerer and Peter Simov Davidson College, Davidson, NC with Mark Wanlass National Renewable Energy Lab, CO ~ Supported by the American Chemical Society – Petroleum Research Fund ~

Quick Outline Review diode capacitance and the DLTS experiment Our measurements and an unusual result A possible explanation and a nice way to test it …

Bias-Dependent Depletion + + - With Bias + + + - + + - - + + + + + - + P+ + + + N - + - + + + + + + + + - - + + - + + Depletion Layer

Diode Capacitance C = DQ/DV ~ eA/d d1 Vbuilt-in d2 Vbuilt-in+Vapplied No bias Vbuilt-in C = DQ/DV ~ eA/d ENERGY d2 Vbuilt-in+Vapplied Reverse bias Reverse bias increases the separation between the layers where free charge is added or taken away.

Defect characterization via DLTS + + Depletion Layer With Bias Depletion Layer With Bias Depletion Layer With Bias - + Temporary Reduced Bias - Temporary Reduced Bias + - + + + - + + - + + + + + - + P+ + + + N - + - + + + + + + + + - - + + - + + We have used temperature-dependent transient capacitance measurements, more commonly known as deep level transient spectroscopy (DLTS), to explore the distribution of defect levels in In0.53Ga0.47As p+/n diodes. As the negative side is sparsely populated, the depletion layer extends much further into the negative side, as indicated in the drawing. The DLTS experiment involves applying a bias pulse that expands the depletion layer, which changes the capacitance of the device. This gives the mobile charge carriers a chance to move to a new region of the diode. Once they get to this new region, there is the possibility that they will be trapped. By measuring the time it takes for the capacitance to change, we study how charges move into and out of traps, and the capture cross section and the depth of the traps can be determined.

Typical DLTS Measurements

DLTS Experiment (5) (1) (2) (4) (3) Peter Simov (Davidson ’08) Computer with LabVIEW Temp Controller Pulse Generator Cryostat with sample Digital Scope (Tektronix) (1) (2) (3) (4) (5) Oxford 77K Agilent Capacitance meter (Boonton) Here is a diagram of the setup for the experiment. The first step of the acquisition process is initiated by a computer running LabVIEW, a graphical programming language that facilitates instrument control. The computer sends a signal to the temperature controller to set the new temperature. Once the temperature stabilizes, we proceed to step two. The pulse generator sends a bias pulse train to the diode. The response is measured by a capacitance meter and averaged on a digital oscilloscope. Capacitance measurements are made with a Boonton 7200 Capacitance Meter, which uses a 1MHz test signal and has a response time of approximately 30ms. After the data sampling is over, the data is sent to and stored on the computer. Then the next temperature is tested.

Device Structure and Band Diagram { The nominal device structure is presented in Fig. 1 and the associated band diagram is shown in Fig. 2.

Exponential transient analysis The sign of the capacitance transients in Fig. 3 indicates that minority carriers are being trapped during the +0.1V filling pulse when the bias is increased (i.e. made less negative). The observation of a minority carrier trap under reverse bias conditions is unusual, but may be explained by changes in the occupation of hole traps in the n-type material near the p+/n junction (model to be described later). We observe a temperature independent escape mechanism at low temperature. As shown in Fig. 4, thermal activation out of the traps becomes less important with falling temperature, giving way to a constant escape time tesc of approximately 110 ms. We attribute this temperature-independent phenomenon to tunneling through the narrow (on the order of 10nm according to SimWindows2 modeling) barrier that separates holes in the p-type region from adjacent trap states.

Reciprocal Analysis We note a puzzling symmetry between the trap capture and escape times. Let DCtraps(t) be the amplitude of the slow capacitance transient for a filling pulse of length t (see Fig. 5) and let DC0 be the saturated amplitude obtained with a suitably long filling pulse. Then DC0 – DCtraps(t) is proportional to the fraction of unfilled traps and the capture time tcap is obtained from the slope of the plot presented in Fig 6. We find that tcap ~ tesc, and we attribute this symmetry to the similarity of the barrier for the capture and escape processes.

Conclusions Future Work Capacitance transients are non-exponential and rates are incompatible with conventional thermal activation analysis The reciprocal of the capacitance varies linearly with time, and the slope yields a single thermal activation energy of 0.38eV. Future Work Thermally-activated reciprocal behavior is a characteristic of hopping transport. Test dependence on transport distance by varying magnitude of bias pulse.