Samira Khan University of Virginia Jan 23, 2019 ADVANCED COMPUTER ARCHITECTURE Fundamental Concepts: Computing Models Samira Khan University of Virginia Jan 23, 2019 The content and concept of this course are adapted from CMU ECE 740

AGENDA Review from last lecture Fundamental concepts Computing models Data flow architecture

THE VON NEUMANN MODEL/ARCHITECTURE Also called stored program computer (instructions in memory). Two key properties: Stored program Instructions stored in a linear memory array Memory is unified between instructions and data The interpretation of a stored value depends on the control signals Sequential instruction processing One instruction processed (fetched, executed, and completed) at a time Program counter (instruction pointer) identifies the current instr. Program counter is advanced sequentially except for control transfer instructions When is a value interpreted as an instruction?

THE DATA FLOW MODEL (OF A COMPUTER) Von Neumann model: An instruction is fetched and executed in control flow order As specified by the instruction pointer Sequential unless explicit control flow instruction Dataflow model: An instruction is fetched and executed in data flow order i.e., when its operands are ready i.e., there is no instruction pointer Instruction ordering specified by data flow dependence Each instruction specifies “who” should receive the result An instruction can “fire” whenever all operands are received Potentially many instructions can execute at the same time Inherently more parallel

VON NEUMANN VS DATAFLOW Consider a Von Neumann program What is the significance of the program order? What is the significance of the storage locations? Which model is more natural to you as a programmer? a b v <= a + b; w <= b * 2; x <= v - w y <= v + w z <= x * y + *2 - + Sequential * Dataflow z

MORE ON DATA FLOW In a data flow machine, a program consists of data flow nodes A data flow node fires (fetched and executed) when all it inputs are ready i.e. when all inputs have tokens Data flow node and its ISA representation

DATA FLOW NODES

An Example

What does this model perform? val = a ^ b

What does this model perform? val = a ^ b val =! 0

What does this model perform? val = a ^ b val =! 0 val &= val - 1

What does this model perform? val = a ^ b val =! 0 val &= val - 1; dist = 0 dist++;

Hamming Distance int hamming_distance (unsigned a, unsigned b) { int dist = 0; unsigned val = a ^ b; // Count the number of bits set while (val != 0) { // A bit is set, so increment the count and clear the bit dist++; val &= val - 1; } // Return the number of differing bits return dist;

Hamming Distance  Number of positions at which the corresponding symbols are different. The Hamming distance between: "karolin" and "kathrin" is 3 1011101 and 1001001 is 2 2173896 and 2233796 is 3

RICHARD HAMMING Best known for Hamming Code Won Turing Award in 1968 Was part of the Manhattan Project Worked in Bell Labs for 30 years You and Your Research is mainly his advice to other researchers Had given the talk many times during his life time http://www.cs.virginia.edu/~robins/YouAndYourResearch.html

HOW TO BUILD A DATAFLOW MACHINE?

Monsoon Dataflow Processor 1990

Review Set 2 Due Jan 30 Choose 2 from a set of four Dennis and Misunas, “A Preliminary Architecture for a Basic Data Flow Processor,” ISCA 1974. Arvind and Nikhil,“Executing a Program on the MIT Tagged-Token Dataflow Architecture”, IEEE TC 1990. H. T. Kung, “Why Systolic Architectures?,” IEEE Computer 1982. Annaratone et al., “Warp Architecture and Implementation,” ISCA 1986.

Dataflow Graphs a b x y < ip , p , v > {x = a + b; y = b * 7 in (x-y) * (x+y)} a b + *7 - * y x 1 2 3 4 5 Values in dataflow graphs are represented as tokens An operator executes when all its input tokens are present; copies of the result token are distributed to the destination operators ip = 3 p = L token < ip , p , v > instruction ptr port data no separate control flow

Control Flow vs. Data Flow

Static Dataflow Allows only one instance of a node to be enabled for firing A dataflow node is fired only when all of the tokens are available on its input arcs and no tokens exist on any of its its output arcs Dennis and Misunas, “A Preliminary Architecture for a Basic Data Flow Processor,” ISCA 1974.

Static Dataflow Machine: Instruction Templates b + *7 - * y x 1 2 3 4 5 Destination 1 Destination 2 Operand 1 Operand 2 Opcode + 3L 4L 1 2 3 4 5 * 3R 4R - 5L + 5R * out Presence bits Each arc in the graph has an operand slot in the program

Static Dataflow Machine (Dennis+, ISCA 1974) Receive Instruction Templates 1 2 . Op dest1 dest2 p1 src1 p2 src2 FU FU FU FU FU Send <s1, p1, v1>, <s2, p2, v2> Many such processors can be connected together Programs can be statically divided among the processors

Static Data Flow Machines Mismatch between the model and the implementation The model requires unbounded FIFO token queues per arc but the architecture provides storage for one token per arc The architecture does not ensure FIFO order in the reuse of an operand slot The static model does not support Reentrant code Function calls Loops Data Structures

Problems with Re-entrancy Assume this was in a loop Or in a function And operations took variable time to execute How do you ensure the tokens that match are of the same invocation?

Dynamic Dataflow Architectures Allocate instruction templates, i.e., a frame, dynamically to support each loop iteration and procedure call termination detection needed to deallocate frames The code can be shared if we separate the code and the operand storage a token <fp, ip, port, data> frame pointer instruction pointer

A Frame in Dynamic Dataflow 1 2 3 4 5 + 1 2 4 5 3L, 4L Program a b + *7 - * y x 1 2 3 4 5 * 3R, 4R Need to provide storage for only one operand/operator - 3 5L + 5R * out <fp, ip, p , v> 1 2 4 5 3 L 7 Frame

Monsoon Processor (ISCA 1990) op r d1,d2 Code Instruction Fetch ip Operand Fetch fp+r Token Queue Frames ALU Form Token Network Network

Concept of Tagging Each invocation receives a separate tag

Procedure Linkage Operators f a1 an ... get frame extract tag change Tag 0 change Tag 1 change Tag n Like standard call/return but caller & callee can be active simultaneously 1: n: Fork Graph for f token in frame 0 token in frame 1 change Tag 0 change Tag 1

Samira Khan University of Virginia Jan 23, 2019 ADVANCED COMPUTER ARCHITECTURE Fundamental Concepts: Computing Models Samira Khan University of Virginia Jan 23, 2019 The content and concept of this course are adapted from CMU ECE 740