CON-FMC Connect any computer to FPGA through USB June 2019

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Presentation transcript:

Future Design Systems www.future-ds.com CON-FMC Connect any computer to FPGA through USB June 2019 Future Design Systems www.future-ds.com

Connect Linux/Windows/Android to your FPGA board through USB 3.0

An example Running FFT HW core along with C/C++ or Python through USB 3.0

Connect any computer to FPGA through USB CON-FMC Overview

CON-FMC with OS

CON-FMC with FPGA board (carrier board) http://www.future-ds.com/en/products.html#CON_FMC FMC (FPGA Mezzanine Card) VITA http://www.vita.com/ VITA FMC http://www.vita.com/fmc VITA 57.1.1 HPC+/HPCP (HPC plus): 14x40 (560) HPC (High Pin Count): 10x40 (400) LPC (Low Pin Count): 4x40 (160)

CON-FMC USB 3.0 (5Gbit/sec) and 2.0 (480Mbit/sec) Cypress FX3 FMC/FMC+ (LPC, HPC, HPC+) VITA 57.1 LPC Multi-board supporting up to 8 CID Platforms Windows Linux Android (Java and native) Additional features C API to develop user application AMBA AXI/AHB/APB BFM Python Performance ~80~100Mbyte/sec (USB3.0) ~10Mbyte/sec (USB2.0) CON-FMC 1/6 of theoretical bandwidth USB2.0: 480Mbit/sec  60MByte/sec USB3.0: 5Gbit/sec  625MByte/sec USB3.1: 10Gbit/sec USB3.2: 20Gbit/sec Companion products: CON-GPIO, CON-FPGA

CON-FMC Typical Usages Connect any computer to FPGA through USB CON-FMC Typical Usages

Easy to install from GitHub

Example template for AMBA AXI and AHB AMBA AHB memory AMBA AXI memory User case using AHB template for SHA256 (serial) User case using AXI template for AES128 (pipelined)

CON-FMC multi-programming different programs access to different CID Supported Multi-threading the same program access different CID Supported (multi-threading requires user-level exclusion) different programs access the same CID Not supported yet (it requires system-wide exclusion)

Programming interfaces Standard C/C++ interface Python interface

Simple API: C and C++ Minimum code: C API’s GNU GCC supporting Visual Studio: 64-bit & 32-bit

Simple API wrappers Bus Functional Module API Python Generates AXI or AHB write bus transaction with the given arguments: addr: address data: buffer containing data to be written size: num of bytes for each beat length: length of burst, i.e., num of beats

Bandwidth (highly depending on environments) x86_64 Ubuntu 16.04 / USB 3.0 ~50MB/sec for pseudo-DMA loopback (bandwidth for pure payload) ~85MB/sec for stream loopback ~250MB/sec for stream in or out x86_64 Cygwin on Windows / USB 3.0 ~45MB/sec for pseudo-DMA loopback ~45MB/sec for stream loopback ~90MB/sec for stream out ~120MB/sec for stream in Subjects to change

Connect any computer to FPGA through USB CON-FMC Examples

Example project AES (Advance Encryption Standard) ~35 times fast result in terms of time comparing to pure software Data processing speed (MB/sec) [CON-USB case] C program takes 9.733 sec for 1280x960 pixel CON-FMC program takes 0.261 sec [DeepAccel case] C program takes

Example project NeuralFMC system CON-FMC provides a path to receive neural signal data through USB. CON-FMC

Example project HSR/PTP (High-availability Seamless Redundancy and Precision Time Protocol) CON-FMC to inject user-defined Ethernet packets and to snoop packets on the line. CON-FMC Ethernet port Pkt. Gen HSR ring Pkt. Snoop

주소: 대전광역시 유성구 문지로 193, KAIST 문지캠퍼스 학부동 F723호 전화: (042) 864-0211~2 전자우편: contact@future-ds.com 홈페이지: www.future-ds.com 위치: http://ouic.kaist.ac.kr/sub04_06