Global Trigger Finds Correct BX

Slides:



Advertisements
Similar presentations
Counters Chapter 17 Subject: Digital System Year: 2009.
Advertisements

Bunch-by-bunch (relative) polarization measurements using inner annuli of STAR BBC Andrew Gordon April 4, 2008.
A scalable DAQ system using the DRS4 sampling chip H.Friederich 1, G.Davatz 1, U.Hartmann 2, A.Howard 1, H.Meyer 1, D.Murer 1, S.Ritt 2, N.Schlumpf 2 1.
Calibration for different trigger sources (DT,CSC,RPC) S.Bolognesi for the Torino group (with a big help from M. Dalla Valle) DT Cosmic Analysis meeting.
US Beam Test Results and ORCA validation for CMS EMU CSC front-end electronics N. Terentiev Carnegie Mellon University CMS EMU Meeting, CERN June 18, 2005.
CMS Physics Meeting, Dec. 6, Analysis Note on the Validation of the ORCA Simulation of the Endcap Muon CSC Front-end Electronics S. Durkin -- Ohio.
US FAST site test results – a global view from ROOT T. Ferguson, A. Korytov, N. Terentiev* EMU Meeting University of Florida 01/09/2004.
DRAFT version Oct. 15, 2004 Hauser/Mey UCLA 1 Analysis of Oct. 04 Test Beam RPC Data Jay Hauser, Martin von der Mey University of California Los Angeles.
5-Jan-2010 XEB Meeting at CERN 1 Debriefing from first data: CSC muons n Lessons learned u LHC is a quiet machine  CSC HV can remain on at all times,
M.S.P.V.L. Polytechnic College, Pavoorchatram
US FAST site test results – a global view from ROOT T. Ferguson, A. Korytov, N. Terentiev* CMS EMU Meeting The Ohio State University April 16 – 17, 2004.
DRAFT version Oct. 15, 2004 Hauser/Mey UCLA 1 Analysis of Oct. 04 Test Beam RPC Data Jay Hauser, Martin von der Mey University of California Los Angeles.
They are the same as registers since they store binary numbers. Called shifting registers since they shift (left or right) the binary number stored in.
Astable: Having no stable state. An astable multivibrator oscillates between two quasistable states. Asynchronous Having no fixed time relationship Bistable.
Fast Waveform Digitizing in Radiation Detection using Switched Capacitor Arrays Stefan Ritt Paul Scherrer Institute, Switzerland.
EMU DAQ MotherBoard Jianhui Gu The Ohio State University ESR, CERN, November 2003.
CS 151: Digital Design Chapter 5: Sequential Circuits 5-3: Flip-Flops II.
Track-Finder Trigger at the Beam Test Results and Features Darin Acosta, Rick Cavanaugh, Victor Golovtsov, Lindsey Gray, Khristian Kotov, Alex Madorsky,
11 Sep 2009Paul Dauncey1 TPAC test beam analysis tasks Paul Dauncey.
Testing of Latch-TDC Da-Shung Su Jia-Ye Chen, Hsi-Hung Yao, Su-Yin Wang, Ting-Hua Chang, Wen-Chen Chang 2011/07/13.
1 SCA Cell Utilizing Scheme The output of each preamp-shaper channel is sampled continuously at 20 MHz and stored the SCA cells. There are 96 cells for.
Draft of talk to be given in Madrid: CSC Operations Summary Greg Rakness University of California, Los Angeles CMS Run Coordination Workshop CIEMAT, Madrid.
1 DAQ Update MEG Review Meeting, Feb. 17 th 2010.
June 15, 2002David Finley to Aspen PAC Slide 1 Report on 132 nsec Operation Report to the Fermilab.
TGC Timing Adjustment Chikara Fukunaga (TMU) ATLAS Timing Workshop 5 July ‘07.
D0 Status: 01/14-01/28 u Integrated luminosity s delivered luminosity –week of 01/ pb-1 –week of 01/ pb-1 –luminosity to tape: 40% s major.
Digital CFEB (an Update) B. Bylsma, EMU at CMS Week, March 16, Ben Bylsma The Ohio State University.
Transfering Trigger Data to USA15 V. Polychonakos, BNL.
A. Meneguzzo Padova University & INFN Validation and Performance of the CMS Barrel Muon Drift Chambers with Cosmic Rays A. Meneguzzo Padova University.
TGC-electronics commissioning before beam collision Y. Sugaya Osaka-U アトラス総会2004 12/23 河口湖.
BCID Reset T.Dai, H.Boterenbrood, E.Pasqualucci Mar. 26 th 2009 MDT JTAG and BCID/ECID Reset Meeting 1.History; 2.BCID of First Bunch.
1J. Gu CERN CSC Meeting July 2008 DAQMB/FEBs Readiness for First Beam Jianui Gu The Ohio State University.
22 Sept A slight reformulation of (ALCT) muonic timing… In terms of brass tacks.
HCC Derived Clocks. Generated Clocks The HCC generates two clocks from the ePLL 160 MHz clocks and the chip 40 MHz clock, used as a reference: An 80 MHz.
3 Nov 2009G. Rakness (UCLA)1 Weekend of 24 – 25 October Loaded all TMB firmware –Version 15 Oct 2009 XML file created using Jay’s muonic timing constants.
M. LefebvreATLAS LAr week, November 19th HEC-EMEC beam test data analysis Filtering weight synchronization and timing issues TDC timing Cubic timing.
Recall: CFEB inefficiencies Collision Run June 2010G. Rakness (UCLA)1 validation/run135445/ExpressPhysics/Site/PNGS/hORecHits.png.
RHIC Polarimetery A.Bazilevsky for RHIC Polarimetry group RHIC Spin Collaboration Metting April 10 (Friday), 2009.
10/20/09 UCLA Meeting Hauser 1/9 Various updates Update on LHC/CMS schedule: First shots into collimator: Nov. 7 and 8! Circulating beam ~Nov. 18, less.
CMS Week, 3-7 November CSC Trigger Test Beam Report Cast of many.
Status at CERN 8 fills  ~500/pb since last Tuesday – ~5.3/fb delivered, ~4.8/fb recorded, … SEU workshop on Friday – Different detectors have different.
Raw -> RData reprocessing, v2 Vladislav Balagura LLR – Ecole polytechnique / IN2P3 / CNRS 10 Dec 2015 All runs have been reprocessed with the code similar.
Update on “Muonic Timing” of CSC Electronics
Dr. Clincy Professor of CS
Trigger sources in ODIN (new firmware)
AHCAL Beam Interface (BIF)
CSC Synchronization Procedure and Plans
MKD Waveform Measurements
TTC signals: Global Trigger and Global Muon Trigger
UCLA Meeting: Notes TMB upgrade for ME1/1 issues
Issues with Simulating High Luminosities in ATLAS
DR S. & S.S. GHANDHY ENGINEENRING COLLEGE
Clk_ch4 Clk_ch3 Clk_ch2 Clk_ch1 L1A global L1A _ch T0+T0r
Latches, Flip-Flops and Registers
Slice Test: Preliminary Data Analysis The Ohio State University
DAQMB/FEBs Readiness for First Beam
SLB Synchronization in H4 Beam (LIP - Lisbon)
CSC Trigger Primitives Test Beam Studies
Analysis of Oct. 04 Test Beam RPC Data
John Beasley 1/31/2008 Propulsion Group: Solid and Hybrid Profiles
Changes in Level 1 CSC Trigger in ORCA by Jason Mumford and Slava Valuev University of California Los Angeles June 11,
Dr. Clincy Professor of CS
TPC electronics Atsushi Taketani
The Ohio State University CSC Detector Performance Group
Dr. Clincy Professor of CS
Unit 7 Sequential Circuits (Flip Flop)
SYEN 3330 Digital Systems Chapter 7 – Part 1 SYEN 3330 Digital Systems.
Reference Chapter 7 Moris Mano 4th Edition
The Ohio State University USCMS EMU Meeting, FNAL, Oct. 29, 2004
2007 TWEPP – Prague – September 3-7, 2007
Presentation transcript:

Global Trigger Finds Correct BX Assume we have a set of halo event from beam bunch 900. We will see a CSC pulse peak at a fixed offset to the beam clock edge in each chamber. This offset for the pulse beam to beam clock edge remains constant for all halos from this bunch. Bx Pulse Peak SCA Sampling BX number 897 898 889 900 901 902 903 904 Global Trigger Finds Correct BX In the first case assume the L1A Global Trigger finds the correct beam crossing number 900. The CFEB will calculate the L1A phase bit as 1 since it is in the second half of the SCA sample. The CFEB will choose capacitors to store starting at Bx 889. Pulse Peak Bx SCA Sampling BX number 897 898 889 900 901 902 903 904 SCA Start L1A Pulse Peak Time

Global Trigger Finds Wrong BX In the second case assume the L1A Global Trigger finds the wrong beam crossing number 901. The CFEB will calculate the L1A phase bit as 0 since it is in the first half of the SCA sample. The CFEB will choose capacitors to store starting at Bx 901. The pulse peak time will shift by 50 nsec. Pulse Peak Bx SCA Sampling BX number 897 898 889 900 901 902 903 904 SCA Start L1A Pulse Peak Time