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Presentation transcript:

More Example

Remember the steps … Build the truth table Construct the minterm expression Convert the minterm expression into circuits

"English" XOR f(x,y) should output 1 when either x or y is 1, but not both, otherwise, output 0 1 2 input output x y Formula XOR(x,y) xy + xy 1 1 1 1 1 1 Review of last class done by the instructor Specify a truth table defining any function you want For each input row whose output needs to be 1, build an AND circuit that outputs 1 only for that specific input! OR them all together Minterm Expansion Principle – algorithm for building expressions from truth tables

3 NOT AND OR NOT AND x y

Addition as a circuit You (hopefully!) will build a simple adder circuit in lab… input Output:

Addition as a circuit You (hopefully!) will build a simple adder circuit in lab… input output: SUM A full adder sums three bits. (A 2-bit adder is a half adder) x y cin cout sum 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 Share the inputs, but design separate circuits for each output bit... 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1

Building a Full Adder Implementing addition in silicon…? 0 0 0 0 0 Create a circuit for each output bit ! all input bits input output: SUM x y cin cout sum 0 0 0 0 0 0 0 1 0 1 sum output bit 0 1 0 0 1 0 1 1 1 0 Odd Parity Circuit 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1

Building a Full Adder Implementing addition in silicon…? 0 0 0 0 0 Create a circuit for each output bit ! input output: SUM x y cin cout sum all input bits 0 0 0 0 0 x 0 0 1 0 1 y 0 1 0 0 1 c sum output bit 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 Odd Parity Circuit 1 1 0 1 0 You'll build this in Lab! 1 1 1 1 1 cout output bit Majority-1 Circuit

Building a Full Adder Implementing addition in silicon…? Full Adder Create a circuit for each output bit ! input output: SUM Full Adder x y cin cout sum all input bits 0 0 0 0 0 x 0 0 1 0 1 y 0 1 0 0 1 c sum output bit 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 Odd Parity Circuit 1 1 0 1 0 You'll build this in Lab! 1 1 1 1 1 cout output bit Majority-1 Circuit

Composing circuits 4-bit Ripple-carry Adder FA 0 1 1 1 1 1 0 1 + Could we use pieces we already have? two 4-bit inputs 0 1 1 1 1 1 0 1 x y cin + FA LINK TO YOUTUBE cout sum How many output bits?

Getting rid of ANDs ? x y AND(x,y) 1 1 1 1 1 x y OR(x,y) 1 1 1 1 1 1 1 Can you get rid of the ANDs by using only NOTs and ORs? input output x y AND(x,y) 1 1 1 1 1 input output output output x y OR(x,y) NOT(OR(x,y)) NOT(OR(NOT(x),NOT(y))) Write truth table for OR, then negate the output. It should be clear that if you negate the inputs, then you have a match! 1 1 1 1 1 1 1 1 1

AND… without ANDs

NOR NOT AND y x Have the students do the example Formula: not(x) times not(y)

NOR gates NOR gates FACT: ALL gates can be built out of NOR gates… a.k.a. we don't need no AND, OR, NOT! FACT: ALL gates can be built out of NOR gates… Nor gate and how to make other gates with nor gate

NOR equivalencies NOT OR What about AND?

AND… with NORs

Odd parity circuit Let's build an odd parity circuit x y z 1 1 1 1 1 1 Build separate circuits for each output-1 row using ANDs and NOTs 3 Combine them with an OR. Here's the truth table defining a function 1 Let's build an odd parity circuit x y z input output x y z 1 1 1 1 1 1 1 Warmup exercise for students. Ask what would be the answer for x AND y AND z Same for OR. Can we define this for NOT? 1 1 1 1 1 Create NOT "rails" ... if you want to... Write down minterm expansion formula that represents this circuit? 2 18

Odd parity circuit Let's build an odd parity circuit x y z odd(x,y,z) Build separate circuits for each output-1 row using ANDs and NOTs 3 Combine them with an OR. Here's the truth table defining a function 1 Let's build an odd parity circuit x y z input output x y z odd(x,y,z) 1 1 1 1 1 1 1 1 Warmup exercise for students. Ask what would be the answer for x AND y AND z Same for OR. Can we define this for NOT? 1 1 1 1 1 Create NOT "rails" ... if you want to... Write down minterm expansion formula that represents this circuit? 2 19

Odd parity circuit Show that there are many ways to compose these logic gates http://www.blikstein.com/paulo/projects/project_water.html http://en.wikipedia.org/wiki/Fluidics