MICROCONTROLLERS AND EMBEDDED SYSTEMS Unit – 4 : ARM / Thumb Instruction set GEC

Learning Outcomes / Course Outcomes Upon successful completion of the course, the students will be able to understand the architecture and instruction set of ARM Processor.

MICROCONTROLLERS AND EMBEDDED SYSTEMS 1. Introduction to 8051 Microcontroller 2. Interfacing and Applications of The ARM Architecture 4. ARM / THUMB Instruction Set 5. Introduction to Embedded System 6. Embedded Firmware Design and Development

Unit -4 : ARM / THUMB Instruction Set Data processing instructions, Multiply instructions Count leading zeros (CLZ - architecture v5T only) Single word and unsigned byte data transfer instructions Half word and signed byte data transfer instructions Multiple register transfer instructions, Swap memory and register instructions (SWP) Status register to general register transfer instructions Thumb data processing instructions Thumb single register data transfer instructions Thumb multiple register data transfer instructions.

Data processing instructions

Flag bits when S = 1

Test Instruction TEST computes the bit-wise logical AND of first operand (source 1 operand, Rn) and the second operand (source 2 operand, Op2) sets the Conditional code flags (SF, ZF, and PF status flags) according to the result. The result is then discarded.

Examples

Multiply Instructions ARM multiply instructions produce the product of two 32-bit binary numbers held in registers. The result of multiplying two 32-bit binary numbers is a 64-bit product. Recent versions of processors, with an ‘M’ in their name store the full result into two independently specified registers (ARM7DM or ARM7 TM, etc.) other older versions store only the least significant 32 bits into a single register.

Multiply Instructions

'RdHi:RdLo' is the 64-bit number formed by concatenating RdHi (the most significant 32 bits) and RdLo (the least significant 32 bits).'[31:0]' selects only the least significant 32 bits of the result.

Multiply Instructions Simple assignment is denoted by ':='. Accumulation (adding the right-hand side to the left) is denoted by'+=‘.

Assembler Formats Instructions that produce the least significant 32 bits of the product: MUL { } {S} Rd, Rm, Rs MLA { } {S} Rd, Rm, Rs, Rn The following instructions produce the full 64-bit result: { }{S} RdHi, RdLo, Rm, Rs where is one of the 64-bit multiply types (UMULL, UMLAL, SMULL, SMLAL).

Examples Use r10 to store result r10 = 0Use r11 as a counter r11 = 20 r0 has second operand i.e., r0 = [r8] + 4 (indirect addressing + 4 immediate) r1 has the first operand i.e., r1 = [r9] + 4 (indirect addressing + 4 immediate) r10 has multiply accumulate result i.e., r10 = (r0* r1) + r10 [31:0] Do this for 20 times Note : Here r8 and r9 registers values get updated for every iteration

Examples Vector means single number (long) stored in consecutive memory location Let vector size = 6 (One number occupies 6 locations) Vector 1 = Vector 2 = Multiplying two vectors means, here 60 * * * 66 + etc..

Recap... Data processing instructions Multiply instructions