Instruction Set Architecture CHAPTER 6 7/27/2019

Topics for Discussion Instruction set architecture Stored program computer Interface between software and hardware Instructions Design principles Instructions, registers, and memory Simple instructions types and formats 7/27/2019

Where do you go from here (CSE241): Computer Organization Is the study of major components of a modern digital computer, their organization and assembly, and the architecture and inner workings of these components. It also deals with design principles for a good performance. 7/27/2019

Mother Board Contains packages of integrated circuit chips (IC chips) including a processor, cache (several), memory (DRAM), connections for IO devices (networks, disks) 7/27/2019

Central Processing Unit (CPU) Example: Intel 80386 80486Pentium Main components of a CPU are datapath and control unit Datapath is the component of the processor that performs (arithmetic) operations Control is the component of the processor that commands the datapath, memory , IO device according to instruction of the program Cache provides but fast memory that acts as a buffer for slower /larger memory outside the chip. 7/27/2019

Instruction set Architecture An important abstraction between hardware and software. Lets discuss this concept. Computer operation is historically called an instruction. Instructions stored similar to data in a memory give rise to an important foundational concept called the stored program computer. Lets look at MIPS: Microprocessor without Interlocked Pipelined Stages 7/27/2019

Consider a C language statement: C to MIPS instruction Consider a C language statement: f = (g + h) – ( i + j) Compile add t0, g, h add t1,i, j sub f,t0,t1 Design principle 1: simplicity favors regularity In the above example: all instructions have 3 operands 7/27/2019

Register set Where do the data get stored in the CPU? Named locations called registers? How many? Typical small compared to memory sizes. Registers: MIPS-32 has 32 register Denoted by s0, s1, etc. $s0, $s5 Temporary registers are denoted by $t0, $t1 7/27/2019

C to MIPS instruction (with registers) Consider a C language statement: f = (g + h) – ( i + j) Compile add $t0, $s1, $s2 add $t1,$s3,$s4 sub $s0,$t0,$t1 Design principle 2: Smaller is faster Memory available as registers is 32 in number 7/27/2019

Memory Operations Data and instructions are stored in memory outside the CPU. Data is loaded from memory and stored in memory. Load word (lw) Store word (sw) 32 resgiters 230 words or 232 addressable locations or bytes 7/27/2019

C language to Memory instructions g = h + A[8] Compile lw $t0, 32($s3) add $s1, $s2, $t0 sw $t0,48($s3) Base register concept: base register is $s3 and Offset of 32 for 8 words and offset of 48 for 12 words 7/27/2019

Instruction Types add and sub lw and sw Now lets see how we can deal with a constant value data. Consider C language statement: x = x +4 Too complex: lw $t0, AddrConst($s1) add $s3,$s3,$t0 Instead how about: addi $s3,$s3,4 Design principle 3: Make the common case fast. Example “addi” instead of add an constant from memory. 7/27/2019

Instruction format –R type Op 6 bits RS 5 bits Rt Rd Shamt funct Can we use the same format for addi and add? Then we will Have only 11 bit constant 7/27/2019

Instruction format – I type Op 6 bits Rs 5 bits Rt Constant or address 16 bits Design principle 4: good design demands good compromise; Keep instruction length same needing different formats ; I and R type are examples 7/27/2019

Logical operations Shift left Shift right Bit-wise AND Bit-wise OR Example: sll $t2,$so,4 Reg t2 = $so << 4 Shift right Example: srl $t2,$so,4 Reg t2 = $so >> 4 Bit-wise AND Example: and $t0,$t1, $t2 Reg t0 = reg t1 & reg t2 Bit-wise OR Example: or $t0,$t1,$t2 Reg $t0 = $t1 | $t2

Instructions for Selection (if..else) If (i == j) then f = g + h; else f = g – h; bne $s3,$s4, else add $s0,$s1,$s2 j done else: sub $s0,$s1,$s2 done:

Instructions for Iteration (while) while (save[i] == k) i = i + 1; Let i be in reg $s3 Let k be in reg $s5 Let $t1 have the address of Save array element Loop: sll $t1,$s3,2 add $t1,$t1$s6 lw $t0,0($t1) bne $t0,$s5,Exit addi $s3,$s3,1 j Loop

Compiling C procedures int leaf_example (int g, int h, int i, int j) { int f; f = (g + h) – (i + j); return f; } How do you pass the parameters? How does compiler transport the parameters?

Passing Parameters/arguments Special registers for arguments: a0, a1, a2, a3 Save temp register on the stack Perform operations And return value Restore values stored on the stack Jump back to return address

Summary MIPS operands MIPS memory MIPS Assembly language MIPS instructions type and formats And of course, the four design principles. 7/27/2019