Computer Organization Lecture 19 Exam 2 results Project 4: Memory Microprogramming: R-type Lillevik 333f06-l19 University of Portland School of Engineering

Exam 2 statistics Prob Std Ave 1/10 2.3 7.7 2/10 2.7 7.8 3/10 0.7 9.8 4/10 3.0 6.4 5/10 1.9 8.8 6/10 1.2 9.6 7/10 2.2 8.7 8/10 3.7 9/10 8.3 10/10 8.5 12.9 77.8 Lillevik 333f06-l19 University of Portland School of Engineering

MIPS controller From Lecture 12 & 17 Outputs Outputs Inputs IR(31:25) Lillevik 333f06-l19 University of Portland School of Engineering

FSM architecture Present State NS Decoder Output Inputs Outputs ROM Combo logic Flip Flops Lillevik 333f06-l19 University of Portland School of Engineering

Project 5: Memory Memory contains ROM and RAM Size: 16K words ROM: first 256 words RAM: remaining 16K words Not installed: 17K – 64K words Due: Wednesday, November 17 Lillevik 333f06-l19 University of Portland School of Engineering

Requirements Address Map Inputs Outputs Address Memory Input Function 0x000 – 0x0ff ROM 0x100 – 0x3fff RAM 0x4000 – 0xffff No memory installed Address Map Input Function ADR Contains a 16-bit address to access the memory Din Contains a 16-bit data to write into the memory MEMwr When asserted, data is written to the memory Inputs Output Function Dout Contains 16-bit data read from the memory Outputs Lillevik 333f06-l19 University of Portland School of Engineering

MicroAsm Java application: MicroAsm.class, SavitchIn.class Microinstruction: free format, no fixed fields Requires input file: text-only, file.upg Creates output file: file.txt Errors: command line file name, file I/O, unrecognizable token Execution: BlueJ or DOS command line Lillevik 333f06-l19 University of Portland School of Engineering

uProgram tokens Token Value Function Branch 0000 0100 Branch the uPgm to the opcode (default is next address) Rwr 0000 0400 Write to the REG file Imm 0000 0800 uPgm controls ALU function (default is IR[3:0]) PCinc 0000 1000 Increment the PC PCwr 0000 2000 Write to the PC PCwrcond 0000 4000 Write to the PC if EQ is asserted EPC 0000 8000 Select EPC for PC write IoD 0001 0000 Select RALU for memory address (default is PC) MEMwr 0002 0000 Write to the memory (default is to read) IRwr 0004 0000 Write to the IR MDRwr 0008 0000 Write to the MDR Lillevik 333f06-l19 University of Portland School of Engineering

uProgram tokens, continued. Value Function SPCwr 0010 0000 Write to SPC register PCsrc 0020 0000 PC write data is branch address (default is jump address) ALUa-R0 ALUa-PC 0040 0000 0000 0000 First ALU argument is R0 First ALU argument is PC (default is PC) ALUb-R1 ALUb-Ext ALUb-Trnc 0080 0000 0100 0000 Second ALU argument is R1 Second ALU argument is Sign Extended offset Second ALU argument is Truncated offset REG-RALU REG-MDR 0200 0000 REG write data is the RALU REG write data is the MDR Lillevik 333f06-l19 University of Portland School of Engineering

uProgram tokens, continued. Value Function REGfmt 0800 0000 Selects IR[10] for the REG destination (default is IR[9]) ALUOpadd ALUOpsub ALUOpand ALUOpor ALUOpsll ALUOpsrl 0000 0000 1000 0000 2000 0000 3000 0000 8000 0000 9000 0000 ALU function is add ALU function is subtract ALU function is logical AND ALU function is logical OR ALU function is shift left logically ALU function is shift right logically Next Return uPC+1 00 Inserts uPC+1 into uPgm next address (default) Inserts 00 into uPgm next address Lillevik 333f06-l19 University of Portland School of Engineering

MDP16 state diagram ID sll sw srl lw j IF Reset 2 clocks nop R-fmt sw srl lw addi beq j ori subi andi IF Reset 2 clocks 1- 3 additional clocks Lillevik 333f06-l19 University of Portland School of Engineering

IF/ID states Write instruction from memory into IR, Increment the program counter (clock 1) Determine optimistic branch address Dispatch to opcode (clock 2) IRWr PCinc Alua-pc Alub-ext imm aluopadd branch Lillevik 333f06-l19 University of Portland School of Engineering

R-type microprogram Func bits (IR[3:0]) determine ALU operation (clock 3) Write result into register file (clock 4) Rwr reg_Ralu Return aluA_R0 aluB_R1 Lillevik 333f06-l19 University of Portland School of Engineering

R-type microprogram Lillevik 333f06-l19 University of Portland School of Engineering

MDP16 state diagram ID sll sw srl lw j IF Reset nop beq addi ori subi R-fmt sw srl lw addi beq j ori subi andi IF Reset Lillevik 333f06-l19 University of Portland School of Engineering

Sll instruction ALU function is shift left logically Write result into register file Lillevik 333f06-l19 University of Portland School of Engineering

Sll EX state? Origin: 0x20 Operation: clock 3 Functional units RALUout = A << 1 Functional units uPgm must control ALU function ALU funct = shift left logically ALU input R0 Lillevik 333f06-l19 University of Portland School of Engineering

Sll WB state? Next: return to IF Operation: clock 4 Functional units Reg [ IR(10)] = ALUout Functional units Must write to reg file Data comes from RALU Use IR[10] as destination register Lillevik 333f06-l19 University of Portland School of Engineering

MDP16 state diagram ID sll sw srl lw j IF Reset nop beq addi ori subi R-fmt sw srl lw addi beq j ori subi andi IF Reset Lillevik 333f06-l19 University of Portland School of Engineering

Store instruction Find the effective address Write register contents to memory Lillevik 333f06-l19 University of Portland School of Engineering

Store EX state? Origin: 0x50 Operation: clock 3 Functional units ALUout = A + sign-extend (IR[0:9]) Functional units uPgm must control ALU function ALU funct = add ALU inputs R0 Sign-extended offset Lillevik 333f06-l19 University of Portland School of Engineering

Store MEM state? Next: return to IF Operation: clock 4 Memory [ALUout] = B Functional units RALU addresses memory R1 written into memory Lillevik 333f06-l19 University of Portland School of Engineering

Completed Microcode ROM Lillevik 333f06-l19 University of Portland School of Engineering

Lillevik 333f06-l19 University of Portland School of Engineering

Sll microprogram ALU function is shift left logically (clock 3) Write result into register file (clock 4) Rwr reg_Ralu regFmt Return Imm aluA_R0 aluOpSll Lillevik 333f06-l19 University of Portland School of Engineering

Sll microprogram Lillevik 333f06-l19 University of Portland School of Engineering

Store microprogram Find the effective address (clock 3) Write register contents to memory (clock 4) Imm aluA_R0 aluB_ext aluOpAdd IoD MemWr return Lillevik 333f06-l19 University of Portland School of Engineering

Store microprogram Lillevik 333f06-l19 University of Portland School of Engineering