Computer Organization CSC 405 Instruction Sets and Addressing Modes

Characteristics of Machine Instructions The operation of the CPU is determined by the instructions is executes. The collection of different instructions that the CPU can execute is referred to as the CPU’s instruction set. In the VSC we have 8 instructions which are sufficient to emulate any computation. Limiting ourselves to only these instructions makes the hardware design of the VSC very simple (hence the name Very Simple Computer), but it also makes the implementation of programs very impractical. Let’s compare the VSC instruction set with real computers. Types of Operations Data Processing - arithmetic and logic instructions performed mainly on registers Data Storage - memory instructions for moving data between memory and registers Data Movement - I/O instructions to move data and programs between memory and user Control - test and branch instructions for subroutine jump and conditional statements

Number of Addresses An instruction can refer to a different number of addresses dependent on the operation being performed. ADD A Acc <- Acc + A ADD B,C B <- B + C ADD A,B,C A <- B + C Using a stack register, we can also implement zero address instructions ADD T <- T + T-1 3 + 5 3 POP 3 5 POP 5 5 PUSH 8 2 2 2 2 6 6 6 6

Types of Operands Operands Addresses Characters Logical Data Numbers often represented in the same format Integer/Fixed Point Floating Point Decimal Base 10

Pentium II Instructions The Pentium II provides a large number of operation types Data Movement Arithmetic Logical Control Transfer String Operations HLL Support Flag Control Segment Register Protection Cache Management MOV, PUSH ADD, MUL AND, SHL JMP, LOOPE MOVS BOUND STC WAIT, HLT LSL, VERW INVD

Pentium II MMX Instructions The MMX instruction set was added to the Pentium II in 1996. These instructions support multimedia tasks by providing a more efficient transfer and execution of instructions. Using the SIMD model (Flynn’s Categorization) MMX instructions permit the same operation to be performed on multiple data elements in parallel. Multimedia applications involve the use of a large number of relatively small data elements (e.g. 1 byte = 1 pixel, 1 byte = 1 sound sample, 1 byte = 1 character). MMX defines three new data types: packed byte - 8 bytes packed into a 64-bit data element packed word - 4 16-bit words packed into 64-bits packed doubleword - 2 32-bit doublewords packed into 64-bits MMX provides 56 new instructions that operate on these data types.

Addressing Modes The address fields in a typical instruction are small compared to the range of addresses we need to access. In order to achieve the conflicting goals of large address space and small addresses, a number of addressing modes have been developed: Immediate Addressing - the operand is present in the instruction and there is no memory reference Direct Addressing - the address field contains the actual address in memory Indirect Addressing - the address field refers to the location in memory where the actual address is stored Register Addressing - this is direct addressing except that the address field refers to a register rather than a location in memory Register Indirect Addressing - the address field refers to a register containing the address to a location in memory Displacement Addressing - direct addressing in which the actual address is the address in the instruction plus the contents of a register Relative Addressing - same as displacement addressing with PC as the register Stack Addressing - implied register indirect addressing in which the top two stack values are used according the the op-code of the stack instruction