Table 1. Pin Configuration of 555 timer

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Presentation transcript:

Table 1. Pin Configuration of 555 timer DESCRIPTION NO. NAME 5 Control voltage I Controls the threshold and trigger levels. It determines the pulse width of the output waveform. An external voltage applied to this pin can also be used to modulate the output waveform. 7 Discharge Open collector output which discharges a capacitor between intervals (in phase with output). It toggles the output from high to low when voltage reaches 2/3 of the supply voltage. 1 GND O Ground reference voltage 3 Output Output driven waveform 4 Reset Negative pulse applied to this pin to disable or reset the timer. When not used for reset purposes, it should be connected to Vcc to avoid false triggering. 6 Threshold Compares the voltage applied to the terminal with a reference voltage of 2/3 Vcc. The amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop. 2 Trigger Responsible for transition of the flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. 8 V+ Supply voltage with respect to GND M. Ehikhamenle et al. Design and Development of a Smart Digital Tachometer Using At89c52 Microcontroller. American Journal of Electrical and Electronic Engineering, 2017, Vol. 5, No. 1, 1-9. doi:10.12691/ajeee-5-1-1 © The Author(s) 2015. Published by Science and Education Publishing.