Worst-Case TCAM Rule Expansion AUTHOR: ORI ROTTENSTREICH AND ISSAC KESLASSY PUBLISHER: IEEE INFOCOM 2010 PRESENTER: ZONG-LIN SIE DATE: 2010/09/15
Outline Introduction Background Range Expansion Guarantees Experimental Result Suggested Architectures
Introduction In this paper , given several type of rules , provide new upper bounds on the TCAM worst-case rule expansions. For a W-bit range: previously known upon bound:2W-5 TCAMs. this paper’s method provide:W TCAMs. Also propose a modified TCAM architecture that uses additional logic to significantly reduce the rule expansion.
Background (1/3) What is TCAM? Ternary Content Addressable Memory. Packet classification is the core function behind many network application.(routing、filtering…) Hardware-based TCAMs are the standard devices for high-speed packet classification. 1.講出TCAM high-speed的原因(parallel)。
Background (2/3) What is rule expansion? two types of rules: (1) simple rules:need single entry per rule. (2) range rules:might need many entries per rule. Thus cause rule expansion. for example: range[2,4] means 01* and 100 range[1,14] means 0001,001*,01**,10**,11**,1110
Background (3/3) However , power consumption constitutes a bottleneck for TCAM scaling. Given same access rate , a TCAM chip consumes up to 30 times more power than equivalent SRAM chip with a software-based solution. Goal of this paper is to gain a more fundamental understanding of the worst-case number of TCAM entries needed to encode a rule . Provide upper bounds.
Related Work (1/3) Internal expansion : only uses entries from within the range . W-bit field can be encoded in 2W-2 entries for W ≥ 2 . Rule with d fields , can be encoded up to entries . For instance : W=3 , single field R = [1,6] needs 2W-2 = 4 entries. (see 111 as default)
Related Work (2/3) The same way but rely on Gray codes instead of binary codes reduce the worst-case internal range expansion from 2W-2 to 2W-4 for sufficient large W. Using more complex coding , improve to 2W-5 .
Related Work (3/3) External encoding : the same instance , W=3 , R = [1,6] . we encode the range exterior first , and then the range itself is encoded indirectly. So , only 3 entries!
Range Expansion Guarantees (Model and Notations) Definition 1(Header) : is a W-bit string defined on the d fields . Each sub-string of length corresponds to field with . Definition 2(Range Rule) : The range rule in field is defined as an integer range[r1,r2] . r1≤r2 ,both W-bit integers. if xi match , . Match if r1 <= xi <= r2
Range Expansion Guarantees (Model and Notations) Definition 3(TCAM entry) :A TCAM entry is composed of a TCAM rule S = , where {0,1} are bit values and * stands for don’t-care , And an action , where A is a set of actions . A W- bit string b = matches S , denoted as , if for all .
Range Expansion Guarantees (Model and Notations) Ex: R = [1,6] A = {accept ,deny}, ,
Optimal Range Expansion Problem We want to find a TCAM encoding scheme that minimizes the worst-case TCAM expansion over all possible ranges R .
Optimal Range Expansion Problem Then the range expansion f(W) is defined as the best-achievable range expansion for W-bit ranges given all encoding schemes , i.e. To find the range expansion ,we first characterize the extremal range expansion g(W) , which is defined : A range R over is called extremal if R = [0,y] or R = for some arbitrary value of y.
Range Expansion Guarantees Theorem 1 : for all W ≥ 1 , the extremal range expansion satisfies the following upper-bound : (by induction on W) example :for W=3 , the extremal range R = [0,6] can encoded with only 2 TCAMs .(111 , ***) This is better than the best internal encoding (0**,10* ,110) ,which use W=3 TCAMs entries.
Range Expansion Guarantees Theorem 2: for all W≥ 1 , the worst-case range expansion satisfies the following upper-bound: proof: by induction on W ≥ 1. (1) for W = 1 , all non-empty ranges are extremal , therefore , the result follows by Theorem 1. for W = 2 , all non-empty and non-extremal ran- ges are either single points , or[1,2] can be enco- ded in 2 TCAMs.
Range Expansion Guarantees (2) induction step:Now let W ≥ 3 ,and assume the claim true until W – 1. Consider any range , and cut it into 4 sub-ranges. , which and distinguish the following cases:
Range Expansion Guarantees case(1):if , then by induction R can be encoded in at most W-1 entries . case(2):Else if , then this is just a shifted version of the previo- us case and , by lemma 2 ,R can be encoded in at most W-1 entries .
Range Expansion Guarantees case(3) : (a) If is a right –extremal range on , and by lemma 1,can be encoded in g(W-1) TCAM entries . Further by lemma 2 can be encoded in g(W-2) TCAM entries . (b) if can be encoded in g(W-2) TCAM entries , and in g(W-1) TCAM entries .
Range Expansion Guarantees Therefore , in both sub-cases , by theorem 1 , R can be encoded in up to TCAM entries . case(4) : we use 2 different techniques according to the parity of W .
Range Expansion Guarantees
Range Expansion Guarantees
Range Expansion Guarantees Exponential Number of TCAM Entries: Theorem 4: For any classification rule R = of d fields , there is an encoding scheme Linear Number of TCAM Entries Theorem 5:Any classification rule R on d fields can be encoded in at most d.W TCAM entries with- out any additional logic.
Range Expansion Guarantees Example of linear number entries: we first negatively encode the four striped regions , using an encoding of four one-dimensional extremal intervals , 4W . And a default positive entry . Total 4W+1 .
Experimental Result Internal binary-prefix approach 2W-2 = 14. Suggested scheme W = 8.
Suggested Architecture (1/3) Standard INTERNAL –RRODUCT Assume d=2 ,W=4 ,k=2 R1 = [1,14] ×[5,14] R2 = [7,10] ×[2,3] use 6×5 to encode R1 use 3×1 to encode R2 total 33 entries
Suggested Architecture (2/3) Proposed COMBINED-PRODUCT (using complementary to encode , upper bound W) Assume d=2 ,W=4 ,k=2 R1 = [1,14] ×[5,14] R2 = [7,10] ×[2,3] use 12 to encode R1 use 3 to encode R2 total 15 entries
Suggested Architecture (3/3) Proposed COMBINED-SUM (each field of each range is encoded separately) Assume d=2 ,W=4 ,k=2 R1 = [1,14] ×[5,14] R2 = [7,10] ×[2,3] use 3+4 to encode R1 use 3+1 to encode R2 total 11 entries
Suggested Architecture