Computer Evolution and Performance Winter 2012 COMP 2130 Intro Computer Systems Computing Science Thompson Rivers University

Evolution and Performance Course Contents Part I – Review Part II – C Programming Language Part III – Introduction to Computer Systems Introduction Evolution and Performance The Computer System A Top-Level View of Computer Function and Interconnection Cache Memory Internal Memory Technology External Memory Input / Output Operating System Support CPU – Instruction Sets Not the replacement of IPv6; Inter-transition mechanism; But if IPv6 would fail TRU-COMP2130 Evolution and Performance

Unit Learning Objectives Interpret what the concept of stored program computer is. Remember what CPU, ALU, CU, IR, PC, AC, MBR, MAR and IBR are. Explain how the registers in CPU cooperate. Explain what Moore’s Law is. Explain what a microprocessor is. Explain what pipelining is. Explain what cache memory is. Explain what a multicore processor is. Distinguish x86 and x86-64 (oac x64). Explain what an embedded system is. Explain how to assess performace of computers, with clock speed, MIPS and MFLOPS, and benchmarks. Compute the average CPI and MIPS with given benchmark data. TRU-COMP2130 Evolution and Performance

Evolution and Performance Unit Contents Textbook Chapter 2 Computer Evolution and Performance A brief history of computers Designing for performance The evolution of the Intel x86 architecture Embedded systems and the ARM Performance assessment TRU-COMP2130 Evolution and Performance

Evolution and Performance ENIAC Do you know when the first electrical computer was developed? Name Electronic Numerical Integrator And Computer (ENIAC) By whom Eckert and Mauchly Where University of Pennsylvania For what Trajectory tables for weapons When Started 1943 Finished 1946 Too late for war effort Used until 1955 TRU-COMP2130 Evolution and Performance

Evolution and Performance Decimal (not binary) <- interesting 20 accumulators (AC) of 10 digits Programmed manually by switches 8,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second TRU-COMP2130 Evolution and Performance

John von Neumann / Alan Turing Stored Program Computer concept Main memory storing programs and data ALU operating on binary data Control unit (CU) interpreting instructions from memory and executing them Input and output equipment operated by control unit Princeton Institute for Advanced Studies The IAS computer Completed 1952 TRU-COMP2130 Evolution and Performance

Evolution and Performance IAS 1000 × 40 bit words Binary number, or Two 20 bit instructions for each word Set of registers (storage in CPU) Memory Buffer Register (MBR) Memory Address Register (MAR) Instruction Register (IR) Instruction Buffer Register (IBR) Program Counter (PC) Accumulator (AC) Multiplier Quotient (MQ) TRU-COMP2130 Evolution and Performance

Evolution and Performance IBM (...) Punched-card processing equipment 1953 - the 701 IBM’s first stored program computer Scientific calculations 1955 - the 702 Business applications Lead to 700/7000 series TRU-COMP2130 Evolution and Performance

Transistor-Based Computers Transistors Replaced vacuum tubes Smaller; Cheaper; Less heat dissipation Solid state device Made from silicon (sand) Invented 1947 at Bell Labs William Shockley et al – 1956 physics Novel price Transistor–based computers Second generation machines NCR & RCA produced small transistor machines IBM 7000 DEC – 1957 Produced PDP-1 TRU-COMP2130 Evolution and Performance

Generations of Computers Vacuum tube – 1946-1957 Transistor – 1958-1964 Small scale integration – 1965 Up to 100 devices on a chip Medium scale integration – to 1971 100-3,000 devices on a chip Large scale integration – 1971-1977 3,000 - 100,000 devices on a chip Very large scale integration (VLSI) – 1978 -1991 100,000 - 100,000,000 devices on a chip Ultra large scale integration – 1991 – Over 100,000,000 devices on a chip TRU-COMP2130 Evolution and Performance

Evolution and Performance Moore’s Law Increased density of components on chip Gordon Moore – co-founder of Intel Number of transistors on a chip will double every year. Since 1970’s development has slowed a little Number of transistors doubles every 18 months. Cost of a chip has remained almost unchanged. Higher packing density: shorter electrical paths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increase reliability TRU-COMP2130 Evolution and Performance

Evolution and Performance IBM 360 series 1964 Replaced (& not compatible with) 7000 series First planned “family” of computers, i.e., very similar architecture Similar or identical instruction sets Similar or identical OS Increasing speed Increasing number of I/O ports (i.e. more terminals) Increased main memory size Increased cost Multiplexed switch structure TRU-COMP2130 Evolution and Performance

Evolution and Performance DEC PDP-8 1964 First minicomputer (after miniskirt!) Did not need air conditioned room Small enough to sit on a lab bench $16,000 $100k+ for IBM 360 Embedded applications & OEM BUS STRUCTURE TRU-COMP2130 Evolution and Performance

Evolution and Performance PDP-11 VAX family 11/750, 11/780 8000 family 4 MB memory board 512 MB hard disk pack CPU board, not microprocessor yet TRU-COMP2130 Evolution and Performance

Evolution and Performance Semiconductor Memory 1970 Fairchild Size of a single core 1 bit of magnetic core storage Holds 256 bits Non-destructive read Much faster than magnetic core Capacity approximately doubles each year TRU-COMP2130 Evolution and Performance

Evolution and Performance Intel 1971 – 4004 First microprocessor All CPU components on a single IC (Integrated Chip) 4 bit Followed in 1972 by 8008 8 bit (what does this mean?) Both designed for specific applications 1974 – 8080 Intel’s first general purpose microprocessor TRU-COMP2130 Evolution and Performance

Evolution and Performance Summary Stored program computers CPU, ALU, PC, IR, AC, MAR, MBR Backward compatibility Moore’s law Minicomputer Bus structure Microprocessor TRU-COMP2130 Evolution and Performance

Evolution and Performance Chapter Contents A brief history of computers Designing for performance The evolution of the Intel x86 architecture Embedded systems and the ARM Performance assessment TRU-COMP2130 Evolution and Performance

Evolution and Performance Speeding it up Pipelining On board cache On board L1 & L2 cache ... Will be explained. TRU-COMP2130 Evolution and Performance

Evolution and Performance Performance Balance Processor speed increased Memory capacity increased Memory speed lags behind processor speed Slow i/o speed What do you put when you upgrade your old computers? TRU-COMP2130 Evolution and Performance

Logic and Memory Performance Gap TRU-COMP2130 Evolution and Performance

Evolution and Performance Solutions Increase number of bits retrieved at one time Make DRAM “wider” rather than “deeper” Increase interconnection bandwidth High speed buses Hierarchy of buses Change DRAM interface Cache memory Reduce frequency of main memory access More complex cache and cache on chip TRU-COMP2130 Evolution and Performance

Evolution and Performance I/O Devices Peripherals with intensive I/O demands Large data throughput demands Processors can handle this But, problem moving data Solutions: Caching Buffering Higher-speed interconnection buses More elaborate bus structures Multiple-processor configurations TRU-COMP2130 Evolution and Performance

Typical I/O Device Data Rates TRU-COMP2130 Evolution and Performance

Evolution and Performance Key is Balance Processor components Main memory I/O devices Interconnection structures TRU-COMP2130 Evolution and Performance

Improvements in Chip Organization and Architecture Increase hardware speed of processor Fundamentally due to shrinking logic gate size More gates, packed more tightly, increasing clock rate Propagation time for signals reduced Increase size and speed of caches Dedicating part of processor chip Cache access times drop significantly Change processor organization and architecture Increase effective speed of execution Parallelism TRU-COMP2130 Evolution and Performance

Problems with Clock Speed and Logic Density Power Power density increases with density of logic and clock speed Dissipating heat RC delay Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them Delay increases as R×C product increases Wire interconnects thinner, increasing resistance Wires closer together, increasing capacitance Memory latency Memory speeds lag processor speeds Solution: More emphasis on organizational and architectural approaches TRU-COMP2130 Evolution and Performance

Intel Microprocessor Performance TRU-COMP2130 Evolution and Performance

Increased Cache Capacity Typically two or three levels of cache between processor and main memory Chip density increased More cache memory on chip Faster cache access Pentium chip devoted about 10% of chip area to cache Pentium 4 devotes about 50% TRU-COMP2130 Evolution and Performance

More Complex Execution Logic Enable parallel execution of instructions (Note that each instruction consists of multiple cycles.) Pipeline works like assembly line Different stages of execution of different instructions at same time along pipeline Superscalar allows multiple pipelines within single processor Instructions that do not depend on one another can be executed in parallel TRU-COMP2130 Evolution and Performance

Evolution and Performance Diminishing Returns Internal organization of processors complex Can get a great deal of parallelism Further significant increases likely to be relatively modest Benefits from cache are reaching limit Increasing clock rate runs into power dissipation problem Some fundamental physical limits are being reached Then how to improve? TRU-COMP2130 Evolution and Performance

New Approach – Multiple Cores Multiple processors on single chip With large shared cache memory Within a processor, increase in performance proportional to square root of increase in complexity If software can use multiple processors, doubling number of processors almost doubles performance So, use two simpler processors on the chip rather than one more complex processor With two processors, larger caches are justified Power consumption of memory logic less than processing logic TRU-COMP2130 Evolution and Performance

Evolution and Performance Summary Cache memory Buffering Multiple levels of cache Pipelining Multi-core processors TRU-COMP2130 Evolution and Performance

Evolution and Performance Chapter Contents A brief history of computers Designing for performance The evolution of the Intel x86 architecture Embedded systems and the ARM Performance assessment TRU-COMP2130 Evolution and Performance

Evolution and Performance x86 Evolution 8080 first general purpose microprocessor 8 bit data path Used in first personal computer – Altair 8086 – 5MHz – 29,000 transistors much more powerful 16 bit instruction cache, prefetch few instructions 8088 (8 bit external bus) used in first IBM PC 80286 16 Mbyte memory addressable up from 1MB 80386 32 bit Support for multitasking 80486 sophisticated powerful cache and instruction pipelining built in maths co-processor TRU-COMP2130 Evolution and Performance

Evolution and Performance Pentium Superscalar Multiple instructions executed in parallel Pentium Pro Increased superscalar organization Aggressive register renaming branch prediction data flow analysis speculative execution Pentium II MMX technology graphics, video & audio processing Pentium III Additional floating point instructions for 3D graphics TRU-COMP2130 Evolution and Performance

Evolution and Performance Pentium 4 Further floating point and multimedia enhancements Core First x86 with dual core Core 2 64 bit architecture – x86-64 Core 2 Quad – 3GHz – 820 million transistors Four processors on chip x86 architecture dominant outside embedded systems Organization and technology changed dramatically Instruction set architecture evolved with backward compatibility ~1 instruction per month added 500 instructions available See Intel web pages for detailed information on processors TRU-COMP2130 Evolution and Performance

Evolution and Performance Summary Microprocessor 8 bit, 16, 32, 64 ? Personal computer x86, i386, i486, i586, i686, x86-64 Multitasking Superscalar Dual core TRU-COMP2130 Evolution and Performance

Evolution and Performance Chapter Contents A brief history of computers Designing for performance The evolution of the Intel x86 architecture, a general purpose microprocessor Embedded systems and the ARM Performance assessment TRU-COMP2130 Evolution and Performance

Evolution and Performance Embedded Systems General purpose computers / embedded systems Embedded systems Not general purpose computer Used within products Dedicated function E.g., Anti-lock brakes in car TRU-COMP2130 Evolution and Performance

Evolution and Performance Different sizes Different constraints, optimization, reuse Different requirements Real-time, reliability, and many other requirements depending on application areas ARM PDAs and phones such as iPod and iPhone Linux, Palm OS, Symbian OS, Windows mobile Many other microprocessors for embedded systems TRU-COMP2130 Evolution and Performance

Evolution and Performance Chapter Contents A brief history of computers Designing for performance The evolution of the Intel x86 architecture Embedded systems and the ARM Performance assessment TRU-COMP2130 Evolution and Performance

Performance Assessment Key parameters Performance, cost, size, security, reliability, power consumption Three categories of performance assessment: System clock speed Instruction execution rate Benchmarks TRU-COMP2130 Evolution and Performance

Evolution and Performance Clock Speed System clock Signals in CPU take time to settle down to 1 or 0 Speed in Hz Instruction execution in discrete steps An instruction usually consits of fetch, decode, load and/or store, and arithmetic or logical exec steps. Usually one clock cycle is used for each discrete step. -> Usually multiple clock cycles are required per instruction. Pipelining gives simultaneous execution of discrete steps of different instructions during a clock cycle. So, clock speed is not the whole story. Another good idea, then? TRU-COMP2130 Evolution and Performance

Instruction Execution Rate Millions of instructions per second (MIPS) Heavily dependent on instruction set (CISC or RISC), compiler design, processor implementation, cache & memory hierarchy Millions of floating point instructions per second (MFLOPS) Usually used in comparing supercomputers. TRU-COMP2130 Evolution and Performance

Evolution and Performance Benchmarks Programs designed to test performance Written in high level programming language Portable Represents style of task Systems, numerical, commercial E.g., CPU, mail server, web server, ... Easily measured Widely distributed E.g., System Performance Evaluation Corporation (SPEC) TRU-COMP2130 Evolution and Performance