OPA2227 All NPN Output Stage Analysis Precision Linear Analog Applications April 19th, 2018 – Tim Green, Thomas Kuehl

Summary Note: The All NPN Output Stage Analysis presented in this presentation is NOT an exact model for the OPA2227 but rather a similar architecture to show the cause of high frequency oscillations on an All NPN Output Stage due to capacitive loading and the use of an output R-C snubber to fix the issue. An R-C snubber is recommended to prevent high frequency oscillations (>80Mhz) due to light capacitive loads on All NPN Output Stage. Impedance analysis for stability is presented. The all NPN output stage is used in the OPA2227. The Composite PNP/NPN transistor is used for sinking current in this topology. The all NPN output stage is analyzed for output impedance. The Composite PNP/NPN transistor stage which sinks current is shown to have an inductive output impedance, whereas the NPN output stage which sources current is shown to be resistive. Light cap loading of the Composite PNP/NPN transistor can cause oscillation. This is verified in simulation. An output R-C snubber network can eliminate oscillations due to capacitive loading of the Composite PNP/NPN transistor stage. Analysis is provided to prove this. Note: All TINA-TI simulations can be run on the embedded schematics in this presentation by downloading the free TI SPICE simulator, TINA-TI, at: http://www.ti.com/tool/tina-ti

Recommended Snubber for OPA2227 to prevent Light Cload oscillations

Impedance Analysis for Stability

Typical L-C Circuit

Typical L-C Circuit Impedances XL L=1uH Frequency (161kHz) where XC = XL for L-C circuit expect resonance

L-C Resonance from Transient Test

L-C Resonance from Transient Test Transient Resonance at Frequency (161kHz) where XC = XL predicted L-C circuit resonance

Technical Reference: Closed Loop Impedance Stability Analysis (embedded pdf document)

OPA2227 All NPN Output Stage Analysis

OPA2227 Output stage lower transistor design Traditional PNP output transistor has gain and bandwidth limitations when compared to NPN Composite transistor PNP/NPN is used in the Output Stage to enhance current sink performance equivalent to upper NPN source transistor The structure of the composite transistor has local feedback Composite Transistor PNP/NPN

All NPN Output Stage Architecture

All NPN Output Stage Architecture Zout (Closed loop Output Impedance) Note how Zout_plus looks resistive and capacitive, whereas Zout_minus (composite transistor) looks inductive as frequency increases. Specific capacitive loads will cause composite transistor oscillations from any disturbance (noise, transient spikes, etc.)

All NPN Output Stage Architecture – Light Cload

All NPN Output Stage Architecture – Light Cload

All NPN Output Stage Architecture – Light Cload

All NPN Output Stage Architecture – Light Cload fres from Transient Analysis is 10.53MHz and fres predicted form first look at AC Analysis was 12.7MHz. AC first look assumes pure inductance whereas actual resonant circuit has resistive and capacitive effects of Zout.

Snubber minimizes Cload effects of Composite PNP/ NPN Rsn and Csn form a snubber which prevent light Cload from causing PNP/NPN composite stage from oscillating. Rsn limits output current into Cload during fast transitions of output stage. Also in real op amp output Zout and Csn form a pole in the higher frequency portion of the Aol and Rsn and Csn add a zero into this region so phase margin is not degraded

Snubber minimizes Cload effects of Composite PNP/ NPN

Snubber minimizes Cload effects of Composite PNP/ NPN

Snubber minimizes Cload effects of Composite PNP/ NPN