Technical Overview Interleaved Dual-BCM(CRM) PFC - FAN9611/9612 Power Conversion, PCIA July, 2012

Agenda Introduction Application Information Alternate Solutions Tools and Resources Summary

Agenda Introduction Application Information Alternate Solutions PFC Technologies Interleaving Interleaving BCM Summary Application Information Alternate Solutions Tools and Resources Summary

Power Factor Correction (PFC) The Boost Converter Most popular topology for Power Factor Correction Simple power stage Efficient energy storage Continuous input current waveform Operating modes CCM – fixed frequency, complex control, best PF and THD BCM – variable frequency, simple control, good PF and THD DCM – never used intentionally but unavoidable at light load CCM = Continuous-Conduction Mode BCM = Boundary-Conduction Mode (aka Critical Conduction Mode or Transition Mode) DCM = Discontinuous-Conduction Mode PF = Power Factor THD = Total Harmonic Distortion

Continuous Conduction Mode (CCM) (Not to scale) Benefits Peak to RMS ratio lower: Lower I2R losses Low Ripple current: Lower core losses Lower EMI : Smaller Input Filter Can be used at any power level Challenges Requires very fast boost diode with low IRR Silicon Carbide diodes are often used Larger Inductor MOSFET Switching Loss (hard switching) Efficiency Not Best

Boundary Conduction Mode (BCM or CRM) (Not to scale) Benefits Simple to design, well understood control technique MOSFET turns on at zero current and minimum voltage No reverse recovery in boost diode (low cost, low VF diode can be used) Lower current sensing loss compared to CCM PFC Challenges Larger MOSFET conduction loss Variable Frequency High peak current limits practical use to ~300W (Impact on EMI filter) How can we extend the benefits of BCM beyond 300W without paying a penalty for higher peak current and EMI?

Variable Frequency Frequency variations can be summarized as Inductor – larger inductor results in lower switching frequency Load – light load causes higher frequency operation VOUT – higher boost output voltage increases the switching frequency VIN,RMS – either the lowest or the highest input voltage can be the slowest Line cycle – lowest frequency occurs at the peak of the line cycle Can help EMI – depends on the design (minimum frequency)

(Benefits and Challenges) Interleaving (Benefits and Challenges)

Paralleling Converters There are good reasons for paralleling but… Reasons for paralleling Smaller size, modularity Lower component stresses Easier thermal management Does not lower total losses Single power stage: I2*R Parallel: 2*{(0.5*I)2*2*R} = I2*R assuming “same amount of silicon / copper” Switching losses behave the same way – can switch faster due to smaller devices which might help reduce switching losses Does not help in EMI filtering Introduces the need for current balancing among the parallel power stages. If currents are not equal, losses might be higher than single stage design!

Interleaving Brings many more be benefits and just paralleling Interleaving means paralleling converters and operating them in a special phase relationship Phase angle = 360 / number of phases Requires dedicated synchronization circuit Easy with fixed frequency converters / controls Becomes difficult in variable frequency circuits (e.g. BCM) Frequency changes continuously Component tolerances affect frequencies Benefits (in addition to paralleling): EMI reduction Ripple current cancellation Higher ripple frequency Lower capacitor ripple current rating (input and output)

Why Interleaved BCM PFC ? Advantages of Interleaving BCM PFC Stages No reverse recovery Less expensive diode can be used Less switching loss, Less EMI Smaller inductor than single CCM PFC (Overall inductor size is reduced) Less switching loss than CCM PFC (valley switching) Phase management can light-load efficiency Reduced ripple current in the output capacitor (longer life time) BCM CCM

Interleaving BCM PFC: Has Benefits of Single BCM and CCM Advantages Variable switching frequency (spreads out the EMI) MOSFET ZCS turn-on, No reverse recovery loss in the rectifier diode Small inductor Less current sensing loss Drawbacks High ripple current requires large line filter CCM PFC Low ripple current  Small line filter Hard switching in MOSFET and Reverse recovery in diode Larger inductor More current sensing loss Interleaved BCM Boost Plus, Better light load efficiency by phase management and Reduced ripple current in the output capacitor

PFC Technology Comparison Interleaved BCM Solutions Best for Mid-Power Range Single BCM / CRM Interleaved BCM / CRM CCM EMI Filter High peak currents  Larger EMI Filter Smallest EMI Filter Small EMI filter Diode Reverse Recovery Loss ZCS operation  No reverse recovery loss Reverse recovery current  higher switching loss Efficiency Good (lower power levels) Best Good (higher power levels) Diode cost Inexpensive Diodes Need SiC / fast recovery diodes at higher pwr levels Switching Freq. Variable Frequency` Variable Frequency Fixed Frequency Ripple Current Higher ripple current -> larger conduction loss Smaller Ripple currents Smallest Ripple Current Input Filters Large Small Smallest Inductor Size Biggest Bulk Capacitor Size Determined by hold-up time ZVS operation ZVS (when VAC(t) < VO/2 ) Costly ZVS implementation Number of Components Minimal Needs 2 MOSFETs, 2 diodes, 2 L’s & 2 CS R’s Minimal to moderate Cost Lower Cost (but also limited to <300W) Low Cost solution (300W-800W) High cost components to maintain high efficiency

PFC Technology Comparison Interleaved BCM Solutions Best for Mid-Power Range Single BCM / CRM Interleaved BCM / CRM CCM EMI Filter High peak currents  Larger EMI Filter Smallest EMI Filter Small EMI filter Diode Reverse Recovery Loss ZCS operation  No reverse recovery loss Reverse recovery current  higher switching loss Efficiency Good (lower power levels) Best Good (higher power levels) Diode cost Inexpensive Diodes Need SiC / fast recovery diodes at higher pwr levels Switching Freq. Variable Frequency` Variable Frequency Fixed Frequency Ripple Current Higher ripple current -> larger conduction loss Smaller Ripple currents Smallest Ripple Current Input Filters Large Small Smallest Inductor Size Biggest Bulk Capacitor Size Determined by hold-up time ZVS operation ZVS (when VAC(t) < VO/2 ) Costly ZVS implementation Number of Components Minimal Needs 2 MOSFETs, 2 diodes, 2 L’s & 2 CS R’s Minimal to moderate Cost Lower Cost (but also limited to <300W) Low Cost solution (300W-800W) High cost components to maintain high efficiency

Agenda Introduction Application Information Alternate Solutions FAN9611 Product Overview Block Diagram Typical Application Circuit Key Application Information Sync-LockTM Interleaving Easy Valley Switching Advanced Line voltage sensing Line Feed-forward Phase Management Pulse-by-Pulse Current Limit Closed-Loop Soft-Start Line and Output Voltage Protections Adjusting Output Voltage with Line and Load PCB Layout Guidelines PLD/Surge Improvement Alternate Solutions Tools and Resources Summary

FAN9611 Interleaved Dual BCM PFC Controller Efficiency Interleaved  Lower Turn-off Losses Phase Management Valley Switching  Minimize COSS losses Strong gate drive  reduce switching losses Adjust Bulk Output Voltage at Light Load Protection Closed-loop soft-start w/ Prog. Ramp Time Current Limit per Channel Power Limit per Channel Input Voltage Feed-forward Secondary Latched OVP Input Brown-out Protection Internal maximum fSW clamp limit Ease of Design & Solution Size Easy Valley Detection Implementation Easy Loop Compensation (constant BW and PWM Gain) Integrated +1A/-2A Gate Drivers Works with DC, 50 Hz to 400 Hz AC Inputs Bold = Key advantages of FAN9611

Applications from 100 W to 1000 W High Efficiency 100W to 1000W Power Factor Corrected Ac-dc Power Supplies Computing Power High-end Desktops Entry-Level Servers High Digital Display Power Large LCD, PDP and RPTV Displays Consumer Gaming High Power Adapters Home Audio Systems Digital to Analog Set Top Boxes Communication Telecom Front-End Power Industrial Power Systems Solar Inverters (FAN9611 can use DC input) Regardless of available technology, system power design is continuing to get more complex at a geometric pace. Some telecom customers now report using up to 30%of available board space for power and power management. A better solution without compromising efficiency is needed.

Block Diagram - FAN9611 A highly integrated solution in 16 pins

Typical Application Circuit - FAN9611

Key Application Features Design Considerations and Design Considerations of FAN9611

Sync-Lock™ Interleaving Accurate (keeps the two phases perfectly at 180 degrees out of phase) Synchronizes (and locks) Immediately. Works over All Operating Conditions. Cross-coupled internal circuit to minimize mismatch of MOSFET turn-on time Not master-slave method (any phase can be master or slave) The interleaving timing is adaptively changed to prevent CCM of any of two converters In any transient conditions, interleaving is guaranteed without fail DRV1 DRV2 VDS1 VDS2 Steady-State Operation (10µs/div; 20.0V/div) Phase-Adding Operation (10µs/div; 20.0V/div)

Sync-Lock™ Interleaving Ripple Cancellation Reduces Peak Currents IL1 IL2 IL1 + IL2 115 VAC Input 230 VAC Input IL1 IL2 IL1 + IL2

Easy Valley Switching No RC delay circuit required Valley ZVS FAN9611 ZCD circuit senses the slope of auxiliary winding voltage No RC delay circuit required ! Regardless of the component variations (inductor, MOSFET Coss, delay circuit), Guarantee ZVS (when VIN < VO / 2) or Valley Switching (when VIN > VO / 2) Lower EMI and switching noise 220 Vac 110 Vac VGS VGS VDS Valley switching VDS ZVS IL IL

Conventional Valley Switching Difficult to tune the external RC delay Conventional ZCD scheme Requires additional RC delay circuit to tune for the LC resonant period The valley switching is affected by the components variation (MOSFET Coss, delay circuit and inductor value) VZCD

Advanced Line Voltage Sensing Simple Input Sensing without Filter Conventional line voltage sensing Complicated two pole filter Inherent sluggishness from low pass filter Line current distortion when used for FF Advanced line voltage sensing method of FAN9611 Simple voltage divider with only two resistors Fast update of the peak value of the line voltage No line current distortion when used for Feed-Forward

Advanced Line Voltage Sensing Normally, detected line peak information is updated at line voltage zero crossing When the instantaneous input voltage is higher than the peak value stored in S/H, the instantaneous value over-rides the stored peak value When there is no line zero crossing (DC), the line peak value is forced to be updated every 32ms

Line Feed-Forward What is feed-forward ? Input voltage information is used for PWM (Vin↑  TON↓) Not the instantaneous value but the Peak value of Vin is used for FF The ramp generation current is proportional to Vin2

Line Feed-Forward Improves line transient response & provides constant power limit Why Feed-forward for PFC ? Vcomp (error amp output voltage) for a given input power is almost constant regardless of input voltage variations Simply Clamping Vcomp results in constant power limit Minimizes output voltage (output power) variation against the line voltage variation Easy feedback design since transfer function is independent of line voltage Higher bandwidth Less 3rd harmonic in line current Vout Vout Vcomp Vin Vcomp Vin IL1+IL2 IL1+IL2

Phase Management Improves Light-Load Efficiency The switching loss becomes dominant at light load Improved light-load efficiency by shutting down one converter at light load Phase management threshold is programmable using MOT resistor

Phase Management: Effect of Different Thresholds on Efficiency

Phase Management: Gate Drive Waveforms Phase Dropping Phase Adding

Phase Management: Input Current Waveforms Advanced phase management technique causes no visible change in the line current waveforms during phase shedding and adding

Adjusting Phase Management Thresholds Programmable using the MOT Resistor Phase management threshold is pre-determined as a percentage of maximum output power limit Phase management threshold as a percentage of nominal output power is programmable using MOT resistor

Phase Management Maximum Power Limit Clamping Circuit Maximum output power limit level can be also adjusted using external clamping circuit Example for 80PLUS (to improve 20% load efficiency)

Pulse-by-pulse current limit Two Resistors Provide Protection for Each Channel Single resistor Inrush current is measured Too high limit in single phase operation (phase shedding) Negative sense voltage Two resistors (FAN9611) Exact current limit per device More reliable over current protection Lower power dissipation assuming the same thresholds 0.2V current limit threshold voltage

Closed loop soft-start Start-up Waveforms (COMP, FB, and Input Current)

Closed Loop Soft-Start Adaptive E/A Reference to Minimize Startup Overshoot Intelligent Closed loop soft-start of FAN9611 The reference voltage of the error amplifier increases adaptively according to the difference between the real output voltage and reference voltage to prevent the error amplifier saturation The output voltage overshoot can be minimized VOUT VCOMP ILINE

Protections for Line Voltage Shutdown at 70 Vac Line Under-voltage Protection (Brown-out) with variable hysteresis Startup at 80 Vac

Protections for Output Voltage Fail safe enhanced OVP allows additional system safety Primary OVP: using FB pin voltage (non-latching)  8% above normal output voltage Second Independent OVP : using OVP pin voltage (Latching) 15% above normal output voltage (when connected to feedback pin). User programmable when using another voltage divider circuit If Latching-OVP protection is not desired, the OVP pin should be grounded

Adjusting Output Voltage with Line and Load To improve the total ac-dc conversion efficiency, it is desirable to adjust the output voltage of the PFC boost converter With the input AC rms voltage level (boost follower), With output power of the converter (decrease Vout at light load to improve light-load efficiency) Or both These functions can be easily implemented with external circuits The E/A reference (the positive input) is available on the soft-start (SS) pin of FAN9611 AN-8021, Building Variable Output Voltage Boost PFC Converters with the FAN9611/12 Interleaved BCM PFC Controller

Variable Output Voltage Boost PFC (AN-8021)

Variable Output Voltage Boost PFC (AN-8021)

PCB Layout Guidelines: General For high-power applications, two or more PCB layers are recommended The FAN9611 incorporates fast-reacting input circuits, Short propagation delays, and Strong output stages capable of delivering current peaks over 2.0A to facilitate fast voltage transition times. Many high-speed power circuits can be susceptible to noise injected from their own output or external sources, possibly causing output re-triggering These effects can be especially obvious if the circuit is tested in breadboard or non-optimal circuit layouts with long input or output leads. Pay Careful Attention to: Power ground and analog ground Gate drive Current sensing Input voltage sensing

PCB Layout Guidelines: Grounds Power Ground and Analog Ground Power ground (PGND) and analog ground (AGND) should meet at one point only, preferably beneath the FAN9611 All the control components should be connected to AGND without sharing the trace with PGND. The return path for the gate drive current and VDD capacitor should be connected to the PGND pin. Minimize the ground loops between the driver outputs (DRV1, DRV2), MOSFETs, and PGND. Adding the by-pass capacitor for noise on the VDD pin is recommended. It should be connected as close to the pin as possible.

PCB Layout Guidelines: Gate Drive The gate drive pattern should be wide enough to handle 1A peak current. Keep the controller as close to the MOSFETs as possible. This minimizes the length and the loop area (series inductance) of the high-current gate drive traces. Use at least a 15Ω gate drive resistor (RG). A speed-up discharge diode that feeds switching current back into the IC is NOT recommended. An external circuit as shown on the right can be used to control turn-on turn-off transition times.

PCB Layout Guidelines: Current Sense Current Sensing Current sensing should be as short as possible. To minimize noise susceptibility, current sensing should not make a loop.

PCB Layout Guidelines: Vin Sense Input Voltage Sensing (VIN) Since the impedance of voltage divider is large and FAN9611 detects the peak of the line voltage, the VIN pin can be sensitive to the switching noise. The trace connected to this pin should not cross traces with high di/dt to minimize the interference. The noise bypass capacitor for VIN should be connected as close to the pin as possible.

PLD / Surge Improvement on FAN9611 Add zener from VDD to PGND Add Schottkys from DRVx to PGND Add Schottky from VDD to DRVx

PLD / Surge Improvement on FAN9611 Sense Vin signal before bridge diode and use both diodes to OR (L and N path) together. On the single-layer demo board design, Vin signal is sensed from just Line path (so we only sense half period of the AC input). The diode circled in red doesn't appear in single layer demo board.

Agenda Introduction Application Information Alternate Solutions CCM: Loss Analysis between CCM and BCM Tools and Resources Summary

Loss Analysis between CCM and BCM

Loss Breakdown #1 at 115Vac CCM PFC vs. BCM PFC 300W CCM Design 1 (Typical design for reasonable efficiency) MOSFET : STW26NM50 (0.20  @ 25C, 0.46  @ 150C), Coss = 130 pF Diode : STTH5R06 (Hyper FR, trr = 25 ns) : (VF = 2.9V @ 25 C, 1.8 V @ 150C), C = 10 pF Current sensing resistor : 0.0825  Switching frequency = 100 kHz BCM Design MOSFET : Same as above Diode : MUR860 (Ultra FR, trr = 60 ns) : (VF = 1.5V @ 25 C, 1.2 V @ 120C), Current sensing resistor : 0.015  Switching frequency = 55 kHz ~ 600 kHz CCM BCM Gain of BCM MOSFET Conduction Loss @ 150C 2.05 W 2.74 W +0.69 W Diode Conduction Loss @ 150C 1.35 W 0.90W -0.45 W Diode Reverse Recovery Loss ~ 3.00 W 0.00 W ~ -3.00 W Current Sensing Loss 0.56 W 0.09 W -0.47 W MOSFET Capacitive Switching Loss (Coss.effective = 150 pF) 1.20 W -1.20 W TOTAL ~ 8.16 W 3.73 W ~ -4.43 W Line Filter Conduction Loss small large

Loss Analysis between CCM and BCM #1 (300 W design for reasonable efficiency) VLINE=115 VAC Mention Artesyn

Loss Breakdown #2 at 115Vac CCM PFC vs. BCM PFC 300W CCM Design 2 (Optimal design for high efficiency) MOSFET : SPP20N60C3 (CoolMOS): 0.19  @ 25C, 0.43  @ 150C, Coss = 83 pF Diode : SDP04S60 (SiC Schottky) : (VF = 1.9V @ 25C, 2.4 V @ 150C), C = 10 pF Current sensing resistor : 0.0825  Switching frequency = 65 kHz 300W BCM Design MOSFET : Same as CCM design above Diode : MUR860 (Ultra FR, trr = 60 ns) : (VF = 1.5 V @ 25C, 1.2 V @ 120C), Current sensing resistor : 0.015  Switching frequency = 55 kHz ~ 600 kHz CCM BCM Gain of BCM MOSFET Conduction Loss @ 150C 1.92 W 2.56 W +0.64 W Diode Conduction Loss @150C 1.80 W 0.90 W -0.90 W Diode Reverse Recovery Loss 0.00 W Current Sensing Loss 0.56 W 0.09 W -0.47 W MOSFET Capacitive Switching Loss (Coss.effective = 100 pF) 0.52 W -0.52 W TOTAL 4.80 W 3.55 W - 1.25 W Line Filter Conduction Loss Small large Boost Inductor 1.24 mH 130 µH

Loss Analysis between CCM and BCM #2 (300W optimal design for high efficiency) VLINE=115 VAC Mention Artesyn

Appendix: Rectifier Diode Characteristics Ultra Fast Recovery / Fast Recovery Diode Hyper Fast Recovery Diode Stealth Diode Silicon Carbide Schottky Diode

Agenda Introduction, Technology, Applications Application Information Alternate Solutions Tools and Resources Print Collateral FAN9611 Design Tools Evaluation Boards Summary

Print Collateral 1: Datasheets, App Notes Zilker Logo Application Notes AN-6086: Design Considerations AN-8021: Building Variable Output Voltage Boost PFC Converters Data Sheet

Print Collateral 2: White Papers, User Guides Zilker Logo Seminar Topic (2008-2009) Understanding Interleaved Boundary Conduction Mode PFC Converters Evaluation Board User Guides FEB279 400-W 4-Layer Evaluation Board FEB301 400-W 1-Layer Evaluation Board

Print Collateral PFC Technology Selection Guideline by Power Level Zilker Logo

FAN9611 Design Tool v3.00 Ideal Values to Actual Values Zilker Logo

FAN9611 Design Tool v3.00 Recommended Design based on Designer Inputs Zilker Logo

FAN9611 Boost Inductor Calculator MathCAD Tool (Beta) Zilker Logo

Evaluation Boards and Ref Designs 300-W Low profile Universal Input Design (4-layer PCB) – FEBFAN9611_S01U300A (Also available from Mouser website) 400-W Universal Input Design (4-layer PCB) – FEB-388 (was FEB-279) 400-W Universal Input Design (1-layer PCB) – FEB-301 Reference Designs 300-W Low-Profile Univ. Input, 12V Output (FAN9611+FSFA2100) 150-W LED Lighting using Interleaved Flyback approach – Coming Soon

FAN9611/12 FEB388 Evaluation Board 400-W Four-Layer Design Design Specifications VIN Nominal = 85~265 V ac VDD Supply = 13~18 V DC Rated Power = 400 W (400V/1A) Requirements VLINE = 85~265 V ac VOUT = 400 V fSW > 50 kHz Efficiency > 96% down to 20% load (115 V ac) Efficiency > 97% down to 20% load (230 V ac) PF > 0.98 at full load

FAN9611/12 FEB301 Evaluation Board 400-W One-Layer Design Design Specifications VIN Nominal = 85~265 V ac VDD Supply = 13~18 V DC Rated Power = 400 W (400V/1A) Requirements VLINE = 85~265 V ac VOUT = 400 V fSW > 50 kHz Efficiency > 96% down to 20% load (115 V ac) Efficiency > 97% down to 20% load (230 V ac) PF > 0.98 at full load

FAN9611 300 W Low-Profile Eval Board FEBFAN9611_S01U300A Design Specifications VIN Nominal = 85~265 V ac Rated Power = 300 W Output voltage (Rated Current) = 400V (0.75A) Efficiency and power factor Efficiency > 96% down to 20% load (115 V ac) PF > 0.98 at full load

FAN9611/12+FSFA2100 300 W Low Profile Reference design Design Specifications VIN Nominal = 85~265 V ac Rated Power = 300 W Output voltage (Rated Current) = 12V (25A) System configuration Interleaved BCM PFC Asymmetric half bridge converter with current doubler Self-driven synchronous rectification Efficiency and Power factor Efficiency > 90% down to 40% load Efficiency > 85% down to 20% load PF > 0.98 at full load 158 mm 231 mm 18 mm

Interleaved PFC Landing Page www.fairchildsemi.com/interleavedpfc

Agenda Introduction Application Information Alternate Solutions Tools and Resources Summary

FAN9611 Efficiency Improvements Phase Management Minimizes power losses at light load Automatic phase-drop and phase-add Valley Switching Technology Minimizes COSS losses at turn-on of the MOSFET switching Modulate Output Voltage at with Load and Line Voltage (Tracking Boost Implementations) Strong Integrated Gate Drivers Reduce switching losses Low Current Sense Thresholds Low Conduction Losses Maximum Switching Frequency Clamp Low Start-up and Operating

FAN9611 Converter Protection Programmable closed-loop soft-start Minimizes output voltage overshoot at start-up Input brownout protection Dual output over-voltage protection (OVP) – Non-latching and Latching Input voltage feed-forward function Minimizes output voltage variation versus line voltage Provides constant power limit over line Power-limit and Current-limit protection per channel Open-feedback protection VOUT VCOMP ILINE Rectified VIN 110 V ac 220 V ac VOUT VCOMP ILINE

FAN9611 Ease of Design / Solution Size Easy Valley Detection Implementation ZCD sense circuit requires no RC delay Easy Loop Compensation Constant BW and PWM Gain Advanced line voltage sensing method of FAN9611 Simple voltage divider with only two resistors Integrated +2.0 A Sink / 1.0 A Source Gate Drivers High-voltage start-up capability from the FB divider Ripple Current Cancellation  Smaller EMI Filters Numerous Integrated Protections features that would otherwise require additional external components

Fairchild PFC Controllers Portfolio Fairchild’s family of PFC controllers Single-channel boundary-conduction mode PFC controllers Stand-alone continuous conduction-mode PFC controllers, and PFC+PWM combination (combo) controllers.

twitter.com/fairchildSemi www.facebook.com/FairchildSemiconductor www.fairchildsemi.com/engineeringconnections