Bruno Nova Preparação da Dissertação Supervisor: António Araújo MIEIC – FEUP.

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Presentation transcript:

Bruno Nova Preparação da Dissertação Supervisor: António Araújo MIEIC – FEUP

Agenda Context The problem Some existing tools Proposed solution Technology to be used Work plan 23/01/2013Preparação da Dissertação - MIEIC - FEUP2

Context Computer architecture Subject of courses like: Informatics Engineering Electrical Engineering Students learn topics like: Data representation and circuits Composition of a CPU Programming in assembly Processor performance MIPS usually used 23/01/2013Preparação da Dissertação - MIEIC - FEUP3

The problem Students have difficulties understanding: CPU datapath and control Processor pipelining General operation Advantages Hazards Performance calculation … 23/01/2013Preparação da Dissertação - MIEIC - FEUP4

The problem Why do students have these difficulties? Absence of tools that: Are geared towards education Show the CPU state in each execution step Represent the datapath graphically Simulate both unicycle and pipeline versions Are simple to use and understand Some tools exist, but none covers all these aspects 23/01/2013Preparação da Dissertação - MIEIC - FEUP5

Some existing tools MARS 23/01/2013Preparação da Dissertação - MIEIC - FEUP6 Source: [1] No pipeline No visual datapath

Some existing tools ProcSim 23/01/2013Preparação da Dissertação - MIEIC - FEUP7 Source: [2] Few instructions No pipeline Sequential animation

Some existing tools MIPS-Datapath 23/01/2013Preparação da Dissertação - MIEIC - FEUP8 Source: [3] Few instructions Bad state visualization Lim. hazards detection

Some existing tools WebMIPS 23/01/2013Preparação da Dissertação - MIEIC - FEUP9 Source: [4] Static datapath Click for inputs/outputs

Proposed solution Create a simulator of a MIPS CPU that: Integrates various features: Simulate unicycle and pipelined versions Show detailed information step-by-step Displaying the datapath graphically Execute programs or single instructions Identify the critical path and performance Allow configuration of the datapath By parameterizing blocks Reuses or interacts with existing tools Is intuitive and simple to use 23/01/2013Preparação da Dissertação - MIEIC - FEUP10

Technology to be used MIPS architecture Developed in Java Cross-platform language Simplified version for Android tablets Which use Java too Nothing like this exists Reuse work already done 23/01/2013Preparação da Dissertação - MIEIC - FEUP11

Work plan Requirements specification (1 week) Interface specification (1 week) Non-functional prototype Implementation (13 weeks) Internal CPU representation (3 weeks) Editor and simulation (4 weeks) Unicycle Pipeline Datapath configuration (2 weeks) Android version (4 weeks) Documentation and report (2 weeks) 23/01/2013Preparação da Dissertação - MIEIC - FEUP12

References [1]Dr. Kenneth Vollmar and Dr. Pete Sanderson. MARS: An Education-Oriented MIPS Assembly Language Simulator. March Accessed on January 7, vollmar.pdf. vollmar.pdf [2]James Garton. ProcessorSim – A Visual MIPS R2000 Processor Simulator, Accessed on January 7, [3]Andrew Gascoyne-Cecil. MIPS-Datapath. Accessed on January 7, Datapath. Datapath [4]Irina Branovic, Roberto Giorgi, and Enrico Martinelli. WebMIPS: A New Web-Based MIPS Simulation Environment for Computer Architecture Education. Workshop on Computer Architecture Education, 31st International Symposium on Computer Architecture, Accessed on January 8, /01/2013Preparação da Dissertação - MIEIC - FEUP13

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