ECE 721 Alternatives to ROB-based Retirement Spring 2019 Prof. Eric Rotenberg

ROB-based Retirement Benefit At what price? * ROB = Reorder Buffer = Active List Benefit Can roll back to any offending instruction (exception or mispredicted branch) Don’t lose any work prior to the offending instruction At what price? The values of all instructions in the instruction window must be retained so that state can be rolled back to any instruction Since these values are held in the Physical Register File (PRF), the instruction window size (scope for parallelism) is limited by the size of the PRF ECE 721, Spring 2019 Prof. Eric Rotenberg

Checkpoint-based Retirement Idea: Relax requirement that state can be rolled back to any instruction Create periodic checkpoints A checkpoint “pins” physical registers corresponding to the precise architectural state at that point in the dynamic instruction stream Physical registers of intermediate values (not pinned in any checkpoint) are aggressively freed ECE 721, Spring 2019 Prof. Eric Rotenberg

Checkpoint-based Retirement (cont.) Benefit Do not need to buffer results of all instructions in the instruction window Logically, can have a very large instruction window (scope for exposing parallelism) with a disproportionately smaller physical register file Example: Virtual instruction window: 1000s of instructions Physical Register File: few 100s of registers Summary: Decouple perceived size of instruction window from size of PRF. Extract high ILP with efficient resources. At what price? Can’t roll back to any offending instruction (exception or mispredicted branch) May lose work prior to the offending instruction Must judiciously select checkpoint placement Exceptions are rare anyways Confidence estimation for branches ECE 721, Spring 2019 Prof. Eric Rotenberg

Aside: ROB + Checkpoints But didn’t we use checkpoints with ROB? Shadow Map Tables are checkpoints of Rename Map Table However: Shadow Map Tables aren’t involved in the algorithm that determines when physical registers can be freed The ROB controls freeing of physical registers, and ensures the integrity of physical registers pointed to by a Shadow Map Table The only purpose of the Shadow Map Table is to accelerate restoring the Rename Map Table, providing a 1-cycle alternative to forward- walking or backward-walking the ROB ECE 721, Spring 2019 Prof. Eric Rotenberg

Summary ROB-based processor Checkpoint-based processor Fine-grain recovery (roll back to any instruction) Instruction window size = PRF size Checkpoint-based processor Coarse-grain recovery (roll back to selected points) Instruction window size >> PRF size ECE 721, Spring 2019 Prof. Eric Rotenberg