Welcome to DVCon China! Bin “Rocker” Liu General Chair Intel Corp.

Conference Sponsor www.accellera.org Accellera Global Sponsors

Introducing the Steering Committee General Chair Bin “Rocker” Liu Intel Corp. Vice Chair Henry Chew UNISOC Technologies TPC Chair Roman Wang AMD Inc. Poster Chair Lincoln Lee Mentor, A Siemens Business TPC Vice Chair Jinhuang Huang Tsinghuaic Short Workshop Chair Simon Chang Cadence Design Systems Tutorial Chair Peiyu Liu Qualcomm DVCon US Representative Dennis Brophy Mentor, A Siemens Business Finance Chair Lynn Garibaldi Accellera Accellera Representative Lu Dai Qualcomm

Conference Management Meet the on-site staff that is here to assist you throughout the conference! Robin Albright Conference Management MP Associates, Inc. Kevin Lepine Conference Management MP Associates, Inc. In partnership with:

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Peiyu Liu Tutorial Chair

Tutorials Thank you to our Sponsors: Tutorial 1: Next Gen System Design and Verification for Transportation 1630 – 1800 Ballroom A Tutorial 2: Open Virtual/Hybrid System Platform Speed-up the Idea to SW and HW Design 1630 – 1800 Ballroom B Tutorial 3: Enabling Continuously Fast HW/SW co-Design and co-Verification -- Virtual Prototyping & Hybrid Emulation 1630 – 1800 Pudong

Simon Chang Short Workshop Chair

Short Workshops Thank you to our Sponsors: Short Workshop 1: Portable Coverage: Integrating Formal and Simulation Coverage for Efficient, Faster Verification Signoff 1315 – 1400 Ballroom A Short Workshop 2: Using Portable Stimulus to Verify an ARMv8 Sub-System Integration on an SoC 1315 – 1400 Ballroom B Short Workshop 3: Verification Strategy in a Connected World of 5G 1315 – 1400 Pudong

Short Workshops Thank you to our Sponsors: Short Workshop 4: Smart FPGA Prototyping for Fast Bring-up on Billion-gate Design 1530 – 1615 Ballroom A Short Workshop 5: Billion-cycle Power Estimation using Fast Emulation 1530 – 1615 Ballroom B Short Workshop 6: Using Verification Continuum Platform to Speed PCIe System Verification 1530 – 1615 Pudong

Roman Wang Technical Program Committee Chair

TPC Committee Stuart Lindsay Advanced Micro Devices, Inc. Bin Liu Intel Corp.   Ruping Ma Altran Group Wei Mao Horizon Robotics Libo Meng Analog Devices, Inc. Wu Shan ZTE Pankaj Singh Cadence Design Systems, Inc. Brian Sniderman    Mike Bartley Test and Verification Solutions   William Chen Advanced Micro Devices, Inc. Malathi Chikkanna Broadcom Corp. Leo Fang Synopsys, Inc. Harry Foster Mentor, A Siemens Business Bill Fu Realtek Semiconductor Corp. Shujun Hou Tsinghuaic Ajeetha Kumari CVC Pvt., Ltd. Jia Tian Gigadevice Darko Tomusilovic Vtool Ltd.   Srinivasan Venkataramanan CVC Pvt, Ltv. Alex Wan NXP Semiconductors Justin Wang Media Tek, Inc. Roman Wang Advanced Micro Devices, Inc. Gaoxue Xu Unisoc Communications, Inc. Deyoung Yang Fan Yang Fudan University Baodong Yu Beijing Smartchip Microelectronics Tech.   Alex Zhang Qualcomm, Inc. David Zhang Cadence Design Systems, Inc. Landy Zhang DJI Xiuqin Zhang Xi’an UnilC Semiconductors Xufeng Zhang Unisoc Communications Inc. Junhao Zheng Spreadtrum

Technical Submissions Abstract Submissions 51 Extended Abstracts Submitted 12 Papers Accepted for Oral Presentations 23% Acceptance Rate Poster Session Additional 15 high quality submissions presented as a poster Fully reviewed! Papers & Posters in proceedings online Total of 53% Acceptance Rate for Oral & Poster Presentations

Best Paper & Best Poster Awards YOU BE THE JUDGE! Attendees select the outstanding papers and posters. Voting will close at 16:15 Presentation of Award Recipients will be right before the evening keynote in Ballroom B. https://www.surveymonkey.com/r/FLGPZXT

Special Thanks to our Sponsors KEYNOTES TUTORIALS

Special Thanks to our Sponsors SHORT WORKSHOPS REGISTRATION MEDIA PARTNERS

Welcome Exhibitors

Expo Hours Wednesday, April 17: 10:45 to 18:00 Visit DVCon China’s many interesting exhibitors located in the hall to network with colleagues, collaborate with industry leaders, and hold one on one discussions!

Enjoy DVCon China 2019!

Driving Digitalization With A Boundary Free Innovation Platform Keynote 1 Driving Digitalization With A Boundary Free Innovation Platform Dr. Stefan Jockusch Vice president of Strategy for Siemens PLM Software Thank you to our Sponsor:

The Race for 5G Leadership is ON: Is Our Verification Up to the Task? Keynote 2 The Race for 5G Leadership is ON: Is Our Verification Up to the Task? Susheel Tadikonda Vice President of Verification Continuum Solutions Engineering in the Verification Group at Synopsys Thank you to our Sponsor:

Keynote 3 Michał Siwiński Optimizing Verification Throughput for Verification in a Connected World of 5G and AI/ML Michał Siwiński Vice President of Product Engineering and Management for the System & Verification Group at Cadence Design Systems Thank you to our Sponsor: