Branching Instructions By Dr. S. N. Sampat, Team leader Ms. R. P

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Branching Instructions By Dr. S. N. Sampat, Team leader Ms. R. P Branching Instructions By Dr. S. N. Sampat, Team leader Ms. R. P. Merchant, Member Mr. A. K. Bilakhia, Member RC-1093 , Group-004, Domain-Electrical and Allied branches Team for OER creation IDP in Educational Technology, IIT Bombay Four-Week ISTE STTP on Use of ICT in Education for Online and Blended Learning

Learning Objectives Branching Instructions Define need for branching instruction. Define status of source and destination registers before and after execution of branching instruction Define status of flags on which execution sequence (path) of branching instruction is dependent. State software restart instruction and its vector address. Four-Week ISTE STTP on Use of ICT in Education for Online and Blended Learning

Branching Instructions Two-Week ISTE STTP on Technical Communication The branch group instructions allows the microprocessor to change the sequence of program either conditionally or under certain test conditions. The group includes, (1) Jump instructions, (2) Call and Return instructions, (3) Restart instructions, Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication JUMP ADDRESS BEFORE EXECUTION AFTER EXECUTION Jump unconditionally to the address. The instruction loads the PC with the address given within the instruction and resumes the program execution from specified location. Example: JMP 200H PC JMP 2000H PC 2000 Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication Conditional Jumps Instruction Code Decription Condition For Jump JC Jump on carry CY=1 JNC Jump on not carry CY=0 JP Jump on positive S=0 JM Jump on minus S=1 JPE Jump on parity even P=1 JPO Jump on parity odd P=0 JZ Jump on zero Z=1 JNZ Jump on not zero Z=0 Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication CALL address Call unconditionally a subroutine whose starting address given within the instruction and used to transfer program control to a subprogram or subroutine. Example: CALL 2000H Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication Conditional Calls Instruction Code Description Condition for CALL CC Call on carry CY=1 CNC Call on not carry CY=0 CP Call on positive S=0 CM Call on minus S=1 CPE Call on parity even P=1 CPO Call on parity odd P=0 CZ Call on zero Z=1 CNZ Call on not zero Z=0 Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication RET Return from the subroutine unconditionally. This instruction takes return address from the stack and loads the program counter with this address. Example: RET Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication BEFORE EXECUTION AFTER EXECUTION SP 27FD PC 00 62 SP 27FF PC 6200 00 62 27FDH 27FDH 27FEH 27FEH RET 27FFH 27FFH Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication RST n Restart n (0 to 7) This instruction transfers the program control to a specific memory address. The processor multiplies the RST number by 8 to calculate the vector address. Example: RST 6 Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication BEFORE EXECUTION AFTER EXECUTION SP-1 SP 3000 PC 2000 SP 2999 PC 0030 2FFEH 01 20 2FFEH 2FFFH RST 6 2FFFH 3000H 3000H ADDRESS OF THE NEXT INSTRUCTION IS 2001H Two-Week ISTE STTP on Technical Communication

Branching Instructions Two-Week ISTE STTP on Technical Communication Vector Address For Return Instructions Instruction Code Vector Address RST 0 0*8=0000H RST 1 1*8=0008H RST 2 2*8=0010H RST 3 3*8=0018H RST 4 4*8=0020H RST 5 5*8=0028H RST 6 6*8=0030H Rst 7 7*8=0038H Two-Week ISTE STTP on Technical Communication

OER on 8085 microprocessor Instruction set Thank you all OER on 8085 microprocessor Instruction set