Latest Update DPACC Use-cases

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Presentation transcript:

Latest Update DPACC Use-cases https://docs.google.com/document/d/1eu2489SYeVL180ZzjnagrXTUM1 Qh37GKs6N6rRYDVNM/edit 10/26/2019

Table of Contents Introduction Update on the figures to align with dpacc arch. Introduction Acceleration Models: Lookaside Model, Offload Model (Inline Model), External Model (Data Path Offload Model) Virtualized Acceleration Interfaces: Passthrough-based Acceleration & Virtio-based Acceleration Virtio-lookaside Acceleration & virtio-inline acceleration Targeting Applications: SmallCell Gateway. IPSec between vRAN and vEPC, VRAN IPsec Packet Processing Acceleration NFVI Packet Processing Acceleration PDCP Packet Processing Acceleration Use-cases IPsec  Look Aside Accelerator NFVI Packet Processing Offload Accelerator Combined NFVI Inline and IPsec LA Accelerator NFVI and IPsec Offload Accelerator PDCP Offload Accelerator vRAN application description refined.

Update Summary Refine vRAN application statement revised S1 interface Updated virtio-lookaside figures Remove irrelevant technical details Be aligned with dpacc arch

Targeting applications vRAN (LTE Stack illustration & Accelerator models) Look aside Look aside Inline (offload) Vineet: the leftmost should be changed into GTP. Which can also be accelerated via hardware offload. Two types of look-aside accelerator identified Added into Section 2.1 as examples; Clarifications added in Section 4.3. One types of offload accelerator identified Added into Section 2.2 as examples; Clarifications added in Section 4.3.

Targeting applications (revised S1 interface) vRAN (LTE Stack illustration & Accelerator models) Look aside Look aside Inline (offload) Vineet: the leftmost should be changed into GTP. Which can also be accelerated via hardware offload. Two types of look-aside accelerator identified Added into Section 2.1 as examples; Clarifications added in Section 4.3. One types of offload accelerator identified Added into Section 2.2 as examples; Clarifications added in Section 4.3.

Update Summary Refine vRAN application statement ??? Updated virtio-lookaside figures Remove irrelevant technical details Be aligned with dpacc arch

Look Aside Accelerator v1 (updated) This view is attempting to how the DPACC layer and configuration can be designed by the developer to give his application the best accelerated performance. In this picture having a software acceleration layer in the host would provide the best performance and flexibility for a VNF application. Virtio-Lookaside Acceleration 26/10/2019

Look Aside Accelerator v2 (updated)

IPSec Look Aside Accelerator (to be updated)   IPsec Accelerator HW SAL IPSec g-driver sio-backend (vHost-user) VNF App IPsec App F1 Clear packet Encrypted packet Figure X IPsec Packet Processing – Look Aside Accelerator Flow g-API Acceleration Core Virtio-IPsec Look-aside Frontend sio + Virtio hio s-api Virtio-net App F2 Host kernel Vhost-net IPtables FW OVS DP VLAN/VxLAN Driver Physical ports Suggest to replace this box with a simple “NFVI packet processing box”, like the one used for crypto, IPSec or PME. To be updated according to the consensus reached based on the previous general figures.

PDCP Look Aside Accelerator (to be updated) VNF - PDCP Application SAL SAL SAL guest virtio-net frontend virtio-la-pdcp frontend virtio-net frontend To be updated according to the consensus reached based on the previous general figures. To be aligned with the previous IPSec figure on ingress or outgress part or other processing functions in VNF. sio sio sio virtio-la-pdcp backend + vHost-user virtio-net backend virtio-net backend SAL host SW Accelerator hio hio hio This view is attempting to how the DPACC layer and configuration can be designed by the developer to give his application the best accelerated performance. In this picture having a software acceleration layer in the host would provide the best performance and flexibility for a VNF application. device HW (NIC) HW Accelerator (Crypto) HW (NIC) Backplane Processing RLC/MAC/PHY Downlink Uplink Backhaul Processing GTPU/IPSec/QoS UE EPC 26/10/2019 Packet processing

Todos Address remaining issues online Call for review and feedback Keep on working description of existing applications/use-cases Keep on working on other usecase figures Call for review and feedback Anything missing?