MOS-AK Chengdu Compact Modeling Workshop, June 21-22, 2019 Advanced TFT Modeling Techniques for GOA Driver Circuit Design Optimization An-Thung Cho, Li-feng Wu*, Qiong-hua Mo, James Hsu, Wade Chen, York Lu Chongqing/Chuzhou HKC Optoelectronics technology, China *Huada Empyrean Software Co., Ltd., China

Outline Introduction - Corner Model & Binning Model Results - Combining Corner Model & Binning Model with GOA Circuit Results - Spice Simulation Conclusions 1 2 3 4

HKC introduction and distribution 总占地面积：2800亩 总建筑面积：290万平方米 合肥电视机生产基地 宜昌整机背光生产基地 重庆第8.6代液晶面板与显示器整机生产基地 滁州第8.6代液晶面板生产基地 北海生产基地 合肥惠科 宜昌惠科 东莞惠科平板显示产业园 重庆 滁州惠科 东莞惠科 北海惠科 深圳惠科 深圳总部 云南惠科 云南电子信息产业园 产业布局

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Cu process structure

Abstract The design methodology for gate driving circuit (GOA) is critical to reduce the production cost and power consumption for TFT-LCD. The process fluctuation in the manufacturing of TFT can cause the malfunction of GOA. TFT compact model is the key to take process fluctuation into consideration during design stage.  The testing method and corner modeling for process fluctuation are discussed in this talk. The bin model methodology is also used to help optimize the W/L size of GOA drive circuit. A high reliable A-Si TFT GOA was designed by combining the usage of corner model and bin model. Border-less (GOA) Slim-border (GOA) Border wide (COF)

Why Accurate Model is needed 2019/9/11 The device compact model is the bridge between the process engineers and designers. It is the fundamental step when generating the statistical models. New process Initiate Guess model Design verification Process pre production model 1st Type out Corner model 2nd Type out Binning model Physical trend W/L In actual TFT manufacturing, the performance of TFT due to technology fluctuations should be reflected in simulation. We can through interpolation technique to calculate the effective value by the given W/L and the physical trend will also be maintained. 2019/9/11

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Binning Model W P3 P2 P1 Bin 2 Bin 1 P6 P5 P4 Bin 4 Bin 3 P9 P8 P7 L Each device has its own parameters set and 4 sets of parameters could generate 1 binning model after binning process. If the device geometry is not the boundary, the kernel of model will make use of interpolation technique to calculate the effective value by the given W/L and the physical trend will also be maintained. 2019/9/11

SS FF 2019/9/11

Corner Model Corner Model and Data Distribution Based on the 4 important KOPs, 8 KOP pairs are used to determine the corner model. ( Von , ION ) ( Von , IOFF ) ( Von , SS ) ( ION , IOFF ) ( ION , SS ) ( IOFF , SS ) ( ION, Vth ) KOP2 KOP1 FS TT SF SS FF 1-s 2-s 3-s TT corner: The closest measured data set to the mean value set of KOP1 and KOP2 SS/FF/SF/FS corners: The three sigma (3-s) from the mean is used to define the upper and lower corners of the measured data distribution. 2019/9/11

Corner Model KOPs Corner Model Vth Ion Ioff SS Smallest VDS,10𝑛𝐴∙ 𝑊 𝐿 𝑉 𝐺𝑆𝐿 +0.8∙( 𝑉 𝐺𝑆𝐻 − 𝑉 𝐺𝑆𝐿 ) Ioff 𝑉 𝐺𝑆𝐿 +0.2∙ 𝑉 𝐺𝑆𝐻 − 𝑉 𝐺𝑆𝐿 SS ( 𝜕 log I D 𝜕 V GS ) −1 KOPs VTH: Threshold voltage The gate voltage (VGS) when the TFT driving current is about 10𝑛𝐴∙ 𝑊 𝐿 . Among all the ID-VG current curves, select the one with the smallest VDS. ION：On-state current when considering the ID-VG current behaviors. The ION is the current when the biasing VGS is about 𝑉 𝐺𝑆𝐿 +0.8∙( 𝑉 𝐺𝑆𝐻 − 𝑉 𝐺𝑆𝐿 ). 𝑉 𝐺𝑆𝐻 and 𝑉 𝐺𝑆𝐿 are the largest and smallest VGS values, respectively. IOFF: Leakage current when considering the ID-VG current behaviors. The IOFF is the current when the biasing VGS is about 𝑉 𝐺𝑆𝐿 +0.2∙ 𝑉 𝐺𝑆𝐻 − 𝑉 𝐺𝑆𝐿 . Among all the ID-VG current curves, select the one with the largest VDS. SS: The SS is the subthreshold swing of ID-VG current and its definition is ( 𝜕 log I D 𝜕 V GS ) −1 2019/9/11

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Combining Corner Model with GOA Circuit 2019/9/11 GOA circuit with 13 TFTs. Process fluctuation exists in TFT and we should take process fluctuation into account in circuit simulation. Fig.1 shows the schematic diagram of proposed GOA driving circuit. The circuit contains many TFTs with width over channel length (W/L). Duty ratio of GOA clock signal (CLK) could be modified by TFTs stability after long time operation and guarantee GOA circuit performance. In the GOA driver circuit, TFT performance may change due to fluctuations in the production process, also be reflected in the simulation. We establish a corner model that included the TFT process fluctuation. 2019/9/11

Combining Corner Model with GOA Circuit 2019/9/11 Data of different point import KOP pairs files Extraction Import data from TEG and generate KOP pairs, then, corner model extraction, further more, get the model files. 2019/9/11

Corner model building and extraction flow 2019/9/11

Results - Spice Simulation 2019/9/11 FF SS Spice Results of FF&TT&SS （Left is FF, Middle is TT, Right is SS ） 2019/9/11

Results - Spice Simulation 2019/9/11 The schematic of the GOA output waveform of FF, TT and SS. 2019/9/11

Combining Binning Model with GOA Circuit Acquisition of measurement data for determining W/L points Model extraction According to the construction, the W/L can be calculated indirectly by interpolation method. After W100, W500, W1000, W5000 TFT model card fitting accomplished , binning model can be made Binning model (W/L interpolation method) extraction flow chat. Different W/L model card can obtained from binning model. 2019/9/11

Results - Spice Simulation Spice Results of Binning model with different W size for GOA 2019/9/11

Light-on images for 43” FHD using GOA Technology The GOA technology is verified in large generation G8.6 glass for 43-inch FHD LCD product. 2019/9/11

Conclusions The Process fluctuations in the manufacture of TFT and GOA drive circuit for TFT-LCD have been checked by corner model. The Binning simulation and spice was used for easily predict the W/L size for GOA driver circuit so that we can save the manufacturing time and avoid large-size TFTs burnout during measurement. A GOA circuit driver was used in the manufacture of TFT-LCD and the LCD Panels were lighten on. 1 2 3 2019/9/11

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