Programmable logic and FPGA

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Presentation transcript:

Programmable logic and FPGA CPU Architecture

Objectives What is a programmable logic What is an FPGA Structure Special functions Comparison and Usages Altera Cyclone II 20 FPGA Design Flow

Semiconductor Chips ASICs Microprocessors FPGA & CPLD Microcontrollers Application Specific Integrated Circuits Microprocessors Microcontrollers FPGA & CPLD

Programmable logic An integrated circuit that can be programmed/reprogrammed with a digital logic of a curtain level. Started at late 70s and constantly growing Now available of up to approximately 700K Flip-Flops in a single chip.

Advantages Short Development time Reconfigurable Saves board space Flexible to changes No need for ASIC expensive design and production Fast time to market Bugs can be fixed easily Of the shelf solutions are available

Programmable switch or fuse How it Began : PLA Programmable Logic Array First programmable device 2-level and-or structure One time programmable A B C AND plane Programmable switch or fuse OR plane

Interconnection Matrix SPLD - CPLD Simple Programmable logic device Single AND Level Flip-Flops and feedbacks Complex Programmable logic device Several PLDs Stacked together PLD Block Interconnection Matrix I/O Block A B C Flip-flop Select Enable D Q Clock AND plane MUX

FPGA - Field Programmable Gate Array Programmable logic blocks (Logic Element “LE”) Implement combinatorial and sequential logic. Based on LUT and DFF. Programmable I/O blocks Configurable I/Os for external connections supports various voltages and tri-states. Programmable interconnect Wires to connect inputs , outputs and logic blocks. clocks short distance local connections long distance connections across chip I/O Logic block Interconnection switches

Configuring LUT LUT is a RAM with data width of 1bit. The contents are programmed at power up Truth Table Programmed LUT a b c y 1 Required Function

Special FPGA functions Internal SRAM Embedded Multipliers and DSP blocks Embedded logic analyzer Embedded CPUs High speed I/O (~10GHz) DDR/DDRII/DDRIII SDRAM interfaces PLLs

Comparison

Usages Digital designs where ASIC is not commercial Reconfigurable systems Upgradeable systems ASIC prototyping and emulation Education