Sec (2.3) Program Execution.

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Presentation transcript:

Sec (2.3) Program Execution

Program Execution In the CPU we have CU and ALU, in CU there are two special purpose registers: Instruction Register Program Counter

The architecture of the machine described in Appendix C

Program Execution Instruction Register Is used to holed the instruction being executed Program Counter Contains the address of next instruction to be executed

Program Execution CU performs its job by continually repeating an algorithm that guides it through a 3-steps process known as the Machine Cycle The steps are: fetch decode execute

In fetch step: the CU requests that main memory provide it with the instruction that is stored at the address indicated by the program counter Each instruction in our machine is 2 bytes long, this fetch process involves retrieving the contents of 2 memory cells The CU places the instruction received from memory in its instruction register and then increments the program counter by 2 so, it contains the address of the next instruction stored in memory

Decode step: The instruction new in the instruction register The CU decodes the instruction, which involves breaking the operand field a proper component based on the instructions op-code

Execute step: The CU executes the instruction by activating the appropriate circuitry to perform the requested task

Decoding the instruction B258

Cache memory: There is a cache in CPU which takes the data from memory Small memory and faster in accessing. It is between CPU and RAM It contains the information and instructions which are commonly used