INF5350 – CMOS Image Sensor Design

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IN5350 – CMOS Image Sensor Design
INF5350 – CMOS image sensor design
IN5350 – CMOS Image Sensor Design
Presentation transcript:

INF5350 – CMOS Image Sensor Design Lecture 1 – CMOS camera systems overview

Lecture 1 objectives Overview how cameras work from light in to digital images out Introduce topics to be covered in more detail later in the course 05.10.2019

Literature Only lecture notes are obligatory Reference: Nakamura et al: Ch. 1 (background material) Ch. 2 (until 2.1.2) 05.10.2019

Picture definition Defn: 2D array of pixels (picture elements) each containing numbers (R+G+B or Y+U+V) to describe the pixel color and its brightness (intensity) Zoom-in on LCD screen w/RGB pixels Zoom-in to see individual pixel elements Every pixel outputs Red+Green+Blue light

RGB vs YUV color representation YUV image along with its Y, U, V components. YUV U-V color plane (Y=0.5) Mixing primary colors (RGB)

RGB to YUV, and vice-versa 𝑌 ′ =0.299𝑅+0.587𝐺+0.114𝐵 𝑈=0.492(𝐵− 𝑌 ′ ) 𝑉=0.877(𝑅− 𝑌 ′ ) 𝑌 𝑈 𝑉 = 0.2988 0.5869 0.1143 −0.1689 −0.3311 0.5000 0.5000 −0.4189 −0.0811 𝑅 𝐺 𝐵 𝑅 𝐺 𝐵 = 1 0 1.402 1 −0.3441 −0.7141 1 1.772 0.00015 𝑌 𝑈 𝑉

The electromagnetic spectrum Gamma X-ray UV Visible Infrared Radio waves λ= Wavelength λ=400nm λ=700nm

Digital Image Processing (ISP) Camera system Shutter CIS Digital Image Processing (ISP) Memory card Lens Data bus USB System Controller LCD monitor CIS = CMOS image sensor 05.10.2019

CIS chip architecture example 05.10.2019

Camera signal chain BLACK LEVEL COMPEN-SATION COLOUR PROCESSING LENS CORRECTION DEFECT PIXEL CORRECTION 05.10.2019

Illustration of micro-lens array 0.8-5um diameter (=pixel size) Micro-lenses improve light sensitivity and sharpness Purpose is to focus incoming light to the middle of the pixel to avoid light leakage (losses) to neighbouring pixels and/or light loss due to reflections off transistors, metal routing, etc

Frontside illuminated (FSI) CMOS sensor Micro lense 3-6um Color filter Passivering 1-3um Metal routing Photon detection P-doped silicon 12

Backside illuminated (BSI) CMOS sensor Incoming light 1-2um ’Backside’ BSI avoids the need for the light to go through these routing layers ’Frontside’ After CMOS process, wafer is thinned to ca 5um and placed on a carrier wafer. Then CFA and ulenses are deposited. Better light sensitivity than FSI (Frontside illuminated) sensor BSI technology important for small pixel sizes <6um

FSI vs BSI

CMOS-sensor with ’Bayer’ color filter array Photo diode Repetitive 2x2 pattern (RGBG) CFA = color filter array

CFAs used in CMOS image sensors The choice of CFA depends on application requirements, i.e. light sensitivity vs colour accuracy vs spatial resolution

CMOS pixel array (4T pixels) Cfd PD SF Cfd node converts photon charges (e-) into voltage (DV) SF PD Cfd SF drives voltage on output column bus. SF current source is outside array (one per column) Cfd PD SF Cfd PD SF Vcol0 Vcol1 Ibias Ibias

Conversion gain FD Charge detection scheme: Conversion gain: q = 1.6 x 10-19 C CFD = floating diffusion capacitance Assuming number of electrons capture = Selectrons Voltage swing at FD node: DVFD = CG Selectrons 05/10/2019

Sequential row readout 0V Step-1: enable selected row Step-2: sample each column value (Vcoln) Step-3: disable row Step-4: increment row address, repeat above steps 3V 0V 0V Vcol1 Vcol2 Vcol3 Vcol4

Sequential row readout 0V 0V 3V 0V Vcol1 Vcol2 Vcol3 Vcol4

Sampling and digitizing output from pixel array SHR G x DV C1 Vrst + Vcol<n> G A/D DV Dout SHS - Vsig OpAmp C2 SHR Vrst DV proportional to number of photons in the pixel Vcol<n> DV SHS Vsig

Black level compensation (BLC) ADC output values non-zero even if pixel output signal is zero Any clipping at 0DN in ADC leads to non-linear sensor data (asymmetric histogram curve) Offset voltage (Voffset) added to pixel signal before A/D converter Additional offset comes from dark current generation when operating at elevated temperatures and/or long integration times Image processing functions (e.g. defect pixel correction, lens correction, HDR, and color processing) rely on ‘linear’ pixel values, i.e. proportional to incoming light level (without offsets). Hence, BLC is needed. BLC uses optical black pixels (shielded with opaque material) to estimate average black level value Average across many pixels to remove noise NB. Important black level is same across the array (no shading) INF5442

Black level compensation (BLC) Before BLC After BLC 2Nbits 2Nbits Pix. value (a.u.) Pix. value (a.u.) Offset pedestal Light level (a.u.) Light level (a.u.) Offset due to dark current and/or analogue offset Offset removed. Pixel values are now ‘linear’, ie proportional to light level INF5442

CIS readout chain Dark current BLC component proportional to exposure time and gain, and doubles every ~7degC. Fixed black level independent of Tint, Temp, and Gain Typical values: Vpix_rst=2V, Vpix_sig=1-2V, G=1x-16x, Voffset=50mV, Vref=1V, N=10 INF5442

Example of optical black rows/columns INF5442

Lens shading correction INF5442

Defect pixel correction Objective: Detect and correct abnormal (damaged) pixels Can be done automatically on-the-fly and/or in mass production by writing (x,y) positions into non-volatile memory Correct by interpolation from neighboring pixels DPC complexity and quality depends on power and chip size budget Example image from Wikipedia INF5442

Color interpolation Purpose: to generate R+G+B for each pixel position Three common methods: Nearest neighbor interpolation (Bi)Linear interpolation Bi-Cubic spline interpolation INF5442

Nearest neighbor interpolation x: distance to pixel i f(x): weighting factor INF5442

Linear and Bi-Linear interpolation x: distance to pixel i f(x): weighting factor Linear: Bi-Linear (x and y direction): INF5442

Bi-Cubic spline interpolation INF5442

HW implementation cost INF5442

Color correction Purpose: Improve color accuracy by compensating for crosstalk between R-G-B pixels Crosstalk due to imperfect colour filters, reflections, charge leakage, etc. Matrix ‘A’ = Color correction matrix (CCM) 3x3 matrix with fixed values typically stored in non-volatile memory Blue to green crosstalk, a3 Red to green crosstalk, a1 This condition ensures average brightness remains unchanged INF5442

Camera colour characterization [r, g, b] [R, G, B] Captured raw image (after CIP) After color correction (CCM) Target results INF5442

HDR combines multiple pictures Two captures combined into one picture with correct exposure everywhere!

Tone mapping / gamma curve Purpose: (i) Map output image to 8b RGB display, (ii) Data compression Popular mapping scheme: y(x) = xg g ~0.45 typical value Global TM Same function on entire image Reversable Local TM Function changes accross image Better image quality Non-reversable INF5442

Tone mapping example INF5442

Thanks! 05.10.2019

ADDITIONAL SLIDES FOR INFORMATION 05.10.2019

CIS signal chain (single A/D architecture) 05.10.2019

Digital Camera-on-a-chip in CMOS A/D converters Timing and control Pixel array ISP, PLLs, Vrefs, TempSensor, I/O, etc

Block diagram of CMOS image sensor 2MP, ¼”, 15fps Source: ISSCC ’09

Fabrication of integrated circuits in CMOS ii) 300mm wafers with CMOS die i) From Si-ingot to Si-substrate (300mm) iii) Dicing wafers into die iv) From die to chips in package

Active research topics in the field of CIS design (selected examples) Multi-layer stacked chip camera modules Pixel, ADCs, ISP, memory, I/O in separate layers More parallelism, similar to human visual system High dynamic range (HDR) capture HDR involves combining high/low sensitivity captures How to avoid LED flicker issues How to avoid motion artefacts Reducing power consumption Typical CIS power consumption is 100-500mW Difficult to maintain as array size (resolution) keeps increasing Need <10mW to enable battery driven IoT cameras, pill cameras, door bells, etc. Stacking paradigm shift to enable lower power Improved infrared response for LL imaging, etc 05.10.2019

CCD vs CMOS Foton til elektron konvertering Ladning til spenning konvertering

Analog/Digital conversion (Volts to bits) 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 0000 Input voltage