Microprocessors and Programming Department of Mechatronics Engineering Lecture 1 1 Microprocessors and Programming Dr. Kadir ERKAN Department of Mechatronics Engineering Fall : 2017 10/8/2019

Memory organisation of PIC 16FXXX Microcontroller 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller Features and Function The special function registers can be classified into two categories: Core (CPU) registers - control and monitor operation and processes in the central processor. Even though there are only a few of them, the operation of the whole microcontroller depends on their contents. Peripheral SFRs- control the operation of peripheral units (serial communication module, A/D converter etc.). Each of these registers is mainly specialized for one circuit and for that reason they will be described along with the circuit they are in control of. Since their bits control several different circuits within the chip, it is not possible to classify them into some special group. These bits are described along with the processes they control. 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller Status Register The STATUS register contains: the arithmetic status of the W register, the RESET status and the bank select bits for data memory. One should be careful when writing a value to this register because if you do it wrong, the results may be different than expected. For example, if you try to clear all bits using the CLRF STATUS instruction, the result in the register will be 000xx1xx instead of the expected 00000000. Such errors occur because some of the bits of this register are set or cleared according to the hardware as well as because the bits 3 and 4 are readable only. For these reasons, if it is required to change its content (for example, to change active bank), it is recommended to use only instructions which do not affect any Status bits (C, DC and Z). Refer to “Instruction Set Summary”. 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller The OPTION_REG Register is a readable and writable register, which contains various control bits to configure the TMR0 prescaler/WDT postscaler (single assignable register known also as the prescaler), the external INT interrupt, TMR0 and the weak pull-ups on PORTB. 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller The OPTION_REG Register is a readable and writable register, which contains various control bits to configure the TMR0 prescaler/WDT postscaler (single assignable register known also as the prescaler), the external INT interrupt, TMR0 and the weak pull-ups on PORTB. 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller 10/8/2019

Core SFRs for PIC 16FXXX Microcontroller The Power Control (PCON) register contains flag bits to allow differentiation between a Power-on Reset (POR), a Brown-out Reset (BOR), a Watchdog Reset (WDT) and an external MCLR Reset. 10/8/2019

Reseting Mechanisms Reset condition causes the microcontroller to immediately stop operation and clear its registers. A reset signal may be generated externally at any moment (low logic level on the MCLR pin). If needed, it can also be generated by internal control logic. Power-on always causes reset. Since there are many transitional events taking place when power supply is turned on (switch contact flashing and sparkling, slow voltage rise, gradual clock frequency stabilization etc.), it is necessary to provide a certain time delay for the microcontroller before it starts to operate. Two internal timers- PWRT and OST are in charge of that. The first one can be enabled or disabled during the process of writing a program. Let’s take a look what happens then: 10/8/2019

Reseting Mechanisms Black-out reset takes place when the power supply normally goes off. The microcontroller then has no time to do anything unpredictable simply because the voltage drops very fast beneath its minimum value. In other words the light goes off, curtain falls down and the show is over! 10/8/2019

Reseting Mechanisms When the power supply voltage drops slowly (typical example is battery discharge, although the microcontroller experiences far faster voltage drops as slow processes), the internal electronics gradually stops to operate and the so called Brown-out reset occurs. Here, before the microcontroller completely stops the operation there is a real danger that circuits which operate at higher voltages start to perform unpredictably. Brown-out reset can also cause fatal changes in the program because it is saved in on-chip flash memory. 10/8/2019

Reseting Mechanisms A special type of Brown-out reset occurs in industrial environment when the power supply voltage 'blinks' for a moment and drops beneath minimum level. Even short, such noise in power line may considerably affect the operation of the device. 10/8/2019

Reseting Mechanisms A logic zero (0) on the MCLR pin causes an immediate and regular reset. 10/8/2019

Program Counter The size of the program memory of the PIC16F877 is 8K. Therefore, it has 8192 locations for program storing. For this reason, the Program Counter (PC) is 13 bits wide. The low byte comes from the PCL register which is a readable and writable register. The upper bits (PC<12:8>) are not readable, but are indirectly writable through the PCLATH register. On any Reset, the upper bits of the PC will be cleared. If the program execution does not affect the program counter, the value of this register is automatically and constantly incremented +1, +1, +1, +1... In that way, the program is executed just as it is written- instruction by instruction, followed by a constant address increment. 10/8/2019

Program Counter If the program counter is changed in software, then there are several things that should be kept in mind in order to avoid problems: In assembly language, the value of the program counter is marked with PCL, but it obviously refers to 8 lower bits only. One should take care when using the “ADDWF PCL” instruction. This is a jump instruction which specifies the target location by adding some number to the current address. It is often used when jumping into a look-up table or program branch table to read them. A problem arises if the current address is such that addition causes change on some bit belonging to the higher byte of the PCLATH register. Do you see what is going on? Executing any instruction upon the PCL register simultaneously causes the Prog ram Counter bits to be replaced by the contents of the PCLATH register. However, the PCL register has access to only 8 lower bits of the instruction result and the following jump will be completely incorrect. The problem is solved by setting such instructions at addresses ending by xx00h. This enables the program to jump up to 255 locations. If longer jumps are executed by this instruction, the PCLATH register must be incremented by 1 for each PCL register overflow. 10/8/2019

Program Counter On subroutine call or jump execution (instructions CALL and GOTO), the microcontroller is able to provide only 11-bit addressing. For this reason, similar to RAM which is divided in “banks”, ROM is divided in four “pages” in size of 2K each. Such instructions are executed within these pages without any problems. Simply, since the processor is provided with 11-bit address from the program, it is able to address any location within 2KB. Figure below illustrates this situation as a jump to the subroutine PP1 address. However, if a subroutine or jump address are not within the same page as the location from where the jump is, two “missing”- higher bits should be provided by writing to the PCLATH register. It is illustrated in figure as a jump to the subroutine PP2 address. 10/8/2019

Program Counter 10/8/2019 Blok Adres PCLATH <4>,<3> Page 0 0001-07FF 0 , 0 Page 1 0800-0FFF 0 , 1 Page 2 1000-17FF 1 , 0 Page 3 1800-1FFF 1 , 0 10/8/2019

immediate addressing sample Addressing Modes PIC16FXXX supports mainly 3 addressing modes; immediate addressing direct addressing mode indirect addressing mode immediate addressing sample 10/8/2019

Direct addressing sample Addressing Modes Direct addressing sample 10/8/2019

Indirect Addressing PIC16FXXX is able to perform indirect addressing by means of the INDF and FSR registers. It sometimes considerably simplifies program writing. The whole procedure is enabled because the INDF register is not true one (physically does not exist), but only specifies the register whose address is located in the FSR register. Because of this, write or read from the INDF register actually means write or read from the register whose address is located in the FSR register. FSR: address value INDF: data content 10/8/2019

Indirect Addressing 0x020 ile 0x2F RAM adresleri arasındaki kaydedicilerin içeriğini dolaylı adresleme ile siler!!! 10/8/2019

PORTs One of the most important feature of the microcontroller is a number of input/output pins used for connection with peripherals. In this case, there are in total of thirty-five general purpose I/O pins available, which is quite enough for the most applications. In order pins’ operation can match internal 8-bit organization, all of them are, similar to registers, grouped into five so called ports denoted by A, B, C, D and E. They all have several features in common: For practical reasons, many I/O pins have two or three functions. If a pin is used as any other function, it may not be used as a general purpose input/output pin; and Every port has its “satellite”, i.e. the corresponding TRIS register: TRISA, TRISB, TRISC etc. which determines performance, but not the contents of the port bits. By clearing some bit of the TRIS register (bit=0), the corresponding port pin is configured as output. Similarly, by setting some bit of the TRIS register (bit=1), the corresponding port pin is configured as input. This rule is easy to remember 0 = Output, 1 = Input. 10/8/2019

PORTs 10/8/2019

PORT – A 10/8/2019

PORT – A RA0 – RA1 – RA2 – RA3 – RA5 10/8/2019

PORT – A Only RA4 10/8/2019

PORT – A Only RA4 Pull-up resistance 5 – 10 kohm 10/8/2019

Application Circuit Power circuit, Reset circuit Oscillator circuit Application specific peripheral circuit 10/8/2019