Rekenen en rekenschakelingen Ben Bruidegom AMSTEL Instituut FNWI UvA

Rekenen en rekenschakelingen b Binaire code b Hexadecimale code b Optellen b Two’s complement code b Aftrekken b Arithmetic Logic Unit b Sign extension b Look Ahead Carry Generation b Vermenigvuldigen

Decimale code b 235 = 2* * * 10 0 b Grondtal is 10 Binaire code b 101 = 1* * * 2 0 b Grondtal is 2

Binary code

Binary code (Unsigned Integer)

8 bit = … = …. Range: 0.. n = 8 Range 0 … n = 16 Range 0 … 2 = 32 Range 0.. Unsigned Integer

8 bit = = Range: 0.. n = 8 Range 0.. n = 16 Range 0.. n = 32 Range 0.. Unsigned Integer

8 bit = = 135 Range: 0.. n = 8 Range 0.. n = 16 Range 0.. n = 32 Range 0.. Unsigned Integer

8 bit = = 135 Range: 0.. n = 8 Range (256 –1) n = 16 Range 0.. n = 32 Range 0.. Unsigned Integer

8 bit = = 135 Range: 0.. n = 8 Range n = 16 Range n = 32 Range 0.. Unsigned Integer

8 bit = = 135 Range: 0.. n = 8 Range n = 16 Range n = 32 Range Unsigned Integer

Hexadecimale code b Verkorte schrijfwijze binaire code b Grondtal 16

Optellen       GetalDecimaalBinair A B A + B

Optellen GetalDecimaalBinair transport A B A + B onthouden

Optelschakeling GetalDecimaalBinair transport A B A + B Half adder Full adder Sum bit Carry bit

Pauze b PIDAC-practicum opgaven t/m 2.3.6

Negatieve getallen One’s complement code

Negatieve getallen Two’s complement code

Negatieve getallen Hoe genereer ik een negatief getal?

getal complement Two’s complement Controle: = -25

Negatieve getallen

8 bit = = -121 Range: 0.. n = 8 Range – n = 16 Range n = 32 Range – Signed Integer

Overflow in 4 bit systeem antwoord overflow antwoord – = Negeren 4 bit systeem antwoord overflow antwoord = -11

Two’s complement code

Aftrekken

Aftrekken : -3 – (+6) = -3 +(-6) Negeren 4 bit systeem antwoord overflow antwoord = bits inverteren bij optellen

Arithmetic-Logic Unit Carry in i Carry out i

4 bits ALU

Overflow condities: b Boek bladz. 172 b 8 bit systeem b Overflow =

Bitwise operatoren Bitwise AND-operator (&)

Bitwise operatoren: bittest Bitwise AND-operator (&)

Bitwise operatoren: bit-reset Bitwise AND-operator (&)

Opgaven b Opgaven: tot en met b Vervolg college: uur b De hierna behandelde sheets behoren niet tot de stof die voor AI-studenten is bestemd.

Arithmetic Logic Unit 32 operation result a b ALU

b Bits are just bits (no inherent meaning) — conventions define relationship between bits and numbers b Binary numbers (base 2) decimal: n -1 b Of course it gets more complicated: numbers are finite (overflow) fractions and real numbers negative numbers How do we represent negative numbers? i.e., which bit patterns will represent which numbers? Numbers

 32 bit signed numbers: two = 0 ten two = + 1 ten two = + 2 ten two = + 2,147,483,646 ten two = + 2,147,483,647 ten two = – 2,147,483,648 ten two = – 2,147,483,647 ten two = – 2,147,483,646 ten two = – 3 ten two = – 2 ten two = – 1 ten maxint minintMIPS

b Converting n bit numbers into numbers with more than n bits: MIPS 16 bit immediate gets converted to 32 bits for arithmeticMIPS 16 bit immediate gets converted to 32 bits for arithmetic copy the most significant bit (the sign bit) into the other bits > > copy the most significant bit (the sign bit) into the other bits > > "sign extension"

Conclusion b We can build an ALU to support the MIPS instruction set key idea: use multiplexor to select the output we want (fig )key idea: use multiplexor to select the output we want (fig ) we can efficiently perform subtraction using two’s complementwe can efficiently perform subtraction using two’s complement we can replicate a 1-bit ALU to produce a 32-bit ALUwe can replicate a 1-bit ALU to produce a 32-bit ALU b Important points about hardware all of the gates are always workingall of the gates are always working the speed of a gate is affected by the number of inputs to the gate???the speed of a gate is affected by the number of inputs to the gate??? the speed of a circuit is affected by the number of gates in series (on the “critical path” or the “deepest level of logic”)the speed of a circuit is affected by the number of gates in series (on the “critical path” or the “deepest level of logic”) b Our primary focus: comprehension, however, Clever changes to organization can improve performance (similar to using better algorithms in software)Clever changes to organization can improve performance (similar to using better algorithms in software) we’ll look at two examples for addition and multiplicationwe’ll look at two examples for addition and multiplication

b Is there more than one way to do addition? b Is a 32-bit ALU as fast as a 1-bit ALU? two extremes: ripple carry and sum-of-productstwo extremes: ripple carry and sum-of-products c 1 = b 0 c 0 + a 0 c 0 + a 0 b 0 c 2 = b 1 c 1 + a 1 c 1 + a 1 b 1 = = b 1 (b 0 c 0 + a 0 c 0 + a 0 b 0 )+ a 1 (b 0 c 0 + a 0 c 0 + a 0 b 0 )+ a 1 b 1 c 3 = b 2 c 2 + a 2 c 2 + a 2 b 2 c 3 = c 4 = b 3 c 3 + a 3 c 3 + a 3 b 3 c 4 = Not feasible! Why? Problem: ripple carry adder is slow

Can you see the ripple? How could you get rid of it?

b An approach in-between our two extremes b Motivation: If we didn't know the value of carry-in, what could we do? If we didn't know the value of carry-in, what could we do? When would we always generate a carry? g i = a i. b iWhen would we always generate a carry? g i = a i. b i When would we propagate the carry? p i = a i + b iWhen would we propagate the carry? p i = a i + b i b Did we get rid of the ripple? c 1 = a 0.b 0 + b 0 c 0 + a 0 c 0 = a 0.b 0 + c 0 (b 0 +a 0 ) c 1 = g 0 + p 0 c 0 c 2 = g 1 + p 1 c 1 c 2 = g 1 + p 1 (g 0 + p 0 c 0 ) c 3 = g 2 + p 2 c 2 c 3 = c 4 = g 3 + p 3 c 3 c 4 = Feasible! Why? Carry-lookahead adder

b Can’t build a 16 bit adder this way... (too big) b Could use ripple carry of 4-bit CLA adders b Better: use the CLA principle again! Use principle to build bigger adders

b More complicated than addition accomplished via shifting and additionaccomplished via shifting and addition b More time and more area  Let's look at 3 versions based on gradeschool algorithm 0010 (multiplicand) __x_1011 (multiplier) b Negative numbers: convert and multiply there are better techniques, we won’t look at themthere are better techniques, we won’t look at them Multiplication

Multiplication Multiplier