April 30, A New Tool for Designer-Level Verification: From Concept to Reality April 30, 2014 Ziv Nevo IBM Haifa Research Lab

April 30, Overview Designer-level verification (DLV) DLV tools: historical perspective at IBM Our latest recipe

April 30, Designer-level verification (DLV)

April 30, Life without DLV Logic designer Verification engineer spec RTL

April 30, Weeks later… Logic designer Verification engineer spec fail trace

April 30, DLV ≈ “ Developer testing ” (standard practice in SW) Verification engineer Logic designer RTL Basic checks

April 30, What activities does DLV include? Observing mainstream behavior Exploring corner cases Checking assertions and coverage points Bug hunting Debugging Observation Lightweight verification

April 30, Verification: tools of the trade Simulator Testbench HVL Methodology Scripts Formal Assertions Coverage … Logic designer Verification engineer

April 30, DLV: what should the tools be? Logic designer Simulator Testbench HVL Methodology Scripts Formal Assertions Coverage …

April 30, DLV tools: historical perspective at IBM

April 30, Idea 1: TIMEDIAG (1997) Specify input value/function/random Loop cycle (count/random/condition)

April 30, Idea 1: TIMEDIAG (1997) GenRand  Random instantiation  Simulation  Checking

April 30, TIMEDIAG ingredients simulation Waveform- based interface complex interleavings What’s missing? Interactive define/run/view Event-guided test cases Formal analysis

April 30, What activities does DLV include? Observing mainstream behavior Exploring corner cases Checking assertions and coverage points Bug hunting Debugging Observation Lightweight verification

April 30, Idea 2: PathFinder (2002) Define events View trace Find a trace (formal analysis)

April 30, Idea 2: PathFinder (2002) Main flow: Specify events Find trace View trace Minor feature: Edit inputs on waveform Simulate

April 30, PathFinder ingredients waveform- based interface simulation Interactive define/run/view Event- guided test cases Formal analysis What’s missing? Simple driving (default is random) Fast simulation Integration with common tools

April 30, What activities does DLV include? Observing mainstream behavior Exploring corner cases Checking assertions and coverage points Bug hunting Debugging Observation Lightweight verification

April 30, Another DLV tool

April 30, Jasper Visualize

April 30, Our latest recipe

April 30, Latest recipe: Diver Main flow Specify inputs Simulate View trace IBM Debug and Verification Tool for Designers (DIVER) scenario editor Specify expected results View unexpected results

April 30, Latest recipe: Diver Additional variations Repetitions and delays Specify events on outputs Run-to-failure Simulate or run formal engine Assertions and coverage

April 30, Debugging Import trace Trace from simulation of integrated component Scenario for designer-level component

April 30, Diver ingredients simulation Waveform- based interface Interactive define/run/view Event- guided test cases Formal analysis Climate for DLV

April 30, What activities does DLV include? Observing mainstream behavior Exploring corner cases Checking assertions and coverage points Bug hunting Debugging Observation Lightweight verification

April 30, Conclusions DLV activity should scale linearly with the amount of effort spent Recommended recipe: – Waveform-based interface – Interactive define/run/view – Integration with common tools – Driving inputs – Simulation – Event-based test cases – A touch of formal analysis

April 30, Questions?