Digital Integrated Circuits© Prentice Hall 1995 Design Rules Jan M. Rabaey Design Rules
Digital Integrated Circuits© Prentice Hall 1995 Design Rules Cross-Section of CMOS Technology
Digital Integrated Circuits© Prentice Hall 1995 Design Rules l Interface between designer and process engineer l Guidelines for constructing process masks l Unit dimension: Minimum line width »scalable design rules: lambda parameter »absolute dimensions (micron rules)
Digital Integrated Circuits© Prentice Hall 1995 Design Rules CMOS Process Layers Layer Polysilicon Metal1 Metal2 Contact To Poly Contact To Diffusion Via Well (p,n) Active Area (n+,p+) ColorRepresentation Yellow Green Red Blue Magenta Black Select (p+,n+) Green
Digital Integrated Circuits© Prentice Hall 1995 Design Rules Intra-Layer Design Rules Metal2 4 3
Digital Integrated Circuits© Prentice Hall 1995 Design Rules Transistor Layout
Digital Integrated Circuits© Prentice Hall 1995 Design Rules Via’s and Contacts
Digital Integrated Circuits© Prentice Hall 1995 Design Rules Select Layer
Digital Integrated Circuits© Prentice Hall 1995 Design Rules CMOS Inverter Layout