Linear Technology Corporation

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Linear Technology Corporation
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Presentation transcript:

Linear Technology Corporation LT3070 Backgrounder Steve Knoth Senior Product Marketing Engineer

Agenda Background Past Limitations for LDOs Powering FPGAs/ASICs Advantages of Next Gen Linear Tech LDOs LT3070 Definition Features & Benefits Application Circuits Target Markets Target Applications

Power Business Unit Products: Switching Regulators, DC/DC Controllers, Charge-Pumps, Linear Regulators, Battery Chargers, PMICs, LED Drivers, DC Power Switches Markets: Handheld Battery Powered Products – Cell Phones, Digital Still Cameras, PDAs, MP3 Players, PNDs, etc. Industrial Control and Instrumentation Automotive – Navigation and Infotainment Telecommunications – Infrastructure Computer – Servers, Workstations and Notebook PC

Traditional Limitations for in Powering FPGAs/DSPs/ASICs/µPs For high-performance digital ICs such as FPGAs, DSPs, µP’s, µC’s and ASICs, the trend is for higher currents and lower voltages. More efficient, switching regulators have traditionally been used to power these devices but there are noise and layout limitations, so LDOs have come into play. The LDO must have: Operation over a wide input/output voltage range High output current capability Low output noise Low dropout operation Excellent thermal performance Fast response time High PSRR System debugging features a “+” plus X X X X X X X X

LT3070: What is It? UltraFast™ 5A LDO

LT3070: What is It? UltraFast 5A LDO 5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator New NMOS LDO Family: Low Noise, Programmable Output, High BW Wide VIN Range: 0.95V to 3V Ultra-Low Output Voltage Noise: 25µVRMS (10Hz to 100kHz) Wide VOUT Range: 0.8V to 1.8V in 50mV increments Fast Transient Response Digital Margining for System Debug

LT3070: Block Diagram The LT3070’s architecture drives an internal N-channel power MOSFET as a source follower. This configuration permits a user to realize an extremely low dropout, ultra- fast transient response regulator with excellent high frequency PSRR performance.

LT3070: Key Technical Features * Output Current: 5A Dropout Voltage: 85mV Typical Digitally Programmable VOUT: 0.8V to 1.8V in 50mV steps Digital Output Margining: ±1%, ±3% or ±5% ±1% Accuracy Over Line, Load and Temperature (Initial = 0.2%) Low Output Noise: 25μVRMS (10Hz to 100kHz) Parallelable: Use Two for a 10A Output 28-Lead (4mm × 5mm) QFN Package * Specifications subject to change

LT3070: Other Features * Stable with Low ESR Ceramic Output Capacitors (15μF Min) High Frequency PSRR: 30dB at 1MHz VIOC Pin Controls Upstream Buck Converter to Maintain Low Power Dissipation and Optimize Efficiency PWRGD/UVLO Flag REF/BYP Pin: Single Cap provides programmable soft-start and lowers output noise Enable Function Turns Output On/Off Current Limit Foldback Protection Thermal Shutdown * Specifications subject to change

LT3070: Features & Benefits Ultra-Low Dropout Voltage: 85mV High efficiency, low Vin to low Vout conversion, reduces power dissipation Ultra-Low Noise: 25µVRMS (10Hz to 100kHz) Great for powering noise-sensitive supply rails or for post-regulating switchers Digitally Programmable Vout: 0.8V to 1.8V in 50mV increments Precision output voltage set capability Digital Margining: ±1%, ±3%, ±5% Helpful to determine system tolerance during debug phase Wide Input Voltage Range: 1V to 3V Flexibility, penetration into a wide variety of end markets/applications 2 Devices May be Paralleled (10A) Higher-current capability than a single LDO can provide; spreads heat across a PCB Fast Transient Response Maintains output voltage stability during fast events Reverse Current Protection, Current Limit with Power Foldback, Thermal Shutdown, UVLO Bulletproof protection for the IC and the load Thermally Efficient Package: 4mmx5mm QFN-28, ThetaJA=30°C/W Small package provides plenty of current in a small footprint with great thermal performance

LT3070: Package/Pinout

LT3070 Typical Application Circuit Power Good Indicator Pin-selectable VOUT Small Output Caps!!! Soft Start Control Digital Margining Select 12

LT3070 Post-Buck Regulator Application 1.3V / 7A V BIAS 3.3V PGOOD 0.01µF X7R OUT 2.2µF 47µF 50K LOAD 1 W 2.2 + 4.7 + 10µF X7R, 0805 100µF, 6.3V (x3) PLLLPF MODE PHMODE TRACK BSEL MGN L TC3415EUHF RUN PV CLKOUT SV SW PGND SGND IN I TH THM CLKIN NC FB 0.2µH 6.3V 15K 20K 0.1µF 10pF 100pF 1.0V / 5A Notes: TC3415 Switcher 2MHz internal oscillator PWRGD VIOC GND REF/BYP VO2 VO1 VO0 EN SENSE T3070 MARGTOL MARGSEL 4.7nF 2K Optimal Efficiency across LDO Maintain a constant “VIN – VOUT” across the LDO by adjusting the VITH / VC pin regulation point 13

LT3070 Current Sharing Application Achieve 10A load current capability…or more! 14

LT3070: Typical Applications/Target End Markets FPGA and DSP Supplies ASIC and Microprocessor Supplies Servers and Storage Devices Sensitive Communication Supplies Supply Isolation Post Buck Regulation

LT3070: Conclusion Requirements for LDOs Powering High Performance Digital ICs: Operation over a wide input/output voltage range with high output current capability Low output noise Low dropout operation Excellent thermal performance Fast response time and high PSRR System debugging features a “+” plus LT3070 UltraFast 5A Ultra-Low Dropout, Low Noise LDO: Dropout Voltage: 85mV Typical Digitally Programmable VOUT: 0.8V to 1.8V Digital Output Margining: ±1%, ±3% or ±5% ±1% Accuracy Over Line, Load and Temperature Low Output Noise: 25μVRMS (10Hz to 100kHz) Parallelable: Use Two for a 10A Output 28-Lead (4mm × 5mm) QFN Package