System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD Prototype ROD (6U VME) – Requirements 4 channel (CPMs) prototype Perform zero suppression Perform parity check Format data Buffer formatted data Readout via S-Link (160 Mbyte/s) Spy on ‘Events’ transferred
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Test Set-up
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Test Set-up in the lab
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Testing Slice data (CP) –Serialiser data (20 serialisers/CPM)
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD Testing RoI Data (CP) –RoI data (eight CP Chips/CPM)
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Data received and formatted on the ROD Data sent on to the DSS via S-link Data captured on the ROD spy buffers ‘Event’
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Status summary and plans –Two modules at same status –More tests and minor bugs to be sorted out
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Firmware for the prototype ROD Combine designs 1 & 2 and designs 3 & 4 to use one ROD per combination. Four more designs to do. If the format is given (as in CP RoIs) then RAL can do the designs (preferred)
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) Two more modules will be assembled after few more tests Two (four) PCBs and components need to be ordered for slice test requirements. Total of six (eight) prototype ROD modules for the slice tests.
System Design GroupInstrumentationViraj PereraRAL2-March-01 Prototype ROD (CP/Jet) More S-Link cards ordered ( Delivery March/April 2001) –Six optical ODIN Double (160 Mbyte/s) LDCs –Six optical ODIN Double (160 Mbyte/s) LSCs –Six S-link to PCI carrier cards (destination)