Digital Transmission Systems Part 1 Chapter 8 Digital Transmission Systems Part 1 25/02/2013 Bahman R. Alyaei

1 Basics of PCM About 50% or less of the traffic carried on the PSTN is voice traffic which is initially analog. These analog signals must be converted to a digital format compatible with the digital network. The remaining of the PSTN traffic is digital data, a great portion of which is Internet-related that is already digital. 25/02/2013 Bahman R. Alyaei

Continue… In Digital Networks, the transmission facilities and the switches are digital. The digital waveform on the PSTN is based on Pulse Code Modulation (PCM). In the design of PCM systems for PSTN, the error rate is maintained at BER = 1×10−3. 25/02/2013 Bahman R. Alyaei

Continue… In PCM system, the incoming band limited voice signal (W = 4kHz) is Sampled according to the Nyquist Rate fs = 2W = 8000 samples/sec, Each sample is then quantized through Non-uniform Quantizer, Then each quantized sample is encoded by a k = 8-bit ADC. The bit rate Rb = kfs = 64 kbps. 25/02/2013 Bahman R. Alyaei

Continue… Then, the transmission bandwidth for a single voice channel is approximately BT = 64 kHz. The process of digitization 25/02/2013 Bahman R. Alyaei

“Mid-rise” or “Mid-tread” 2 Quantization Logarithmic law “Compression” Linear Quantizer “Mid-rise” or “Mid-tread” Input signal Non-linear quantizer A Non-linear quantizer consists of a logarithmic law circuit called compressor followed by a linear quantizer. On the receiver side, the inverse of the logarithmic law circuit is used, that is called expander. 25/02/2013 Bahman R. Alyaei

2.1 Companding Companding stands for two words Compression Expansion. Compression: takes place on the transmit side of the Transceiver Circuit, it reduces the dynamic range with little loss of fidelity Expansion: takes place on the receive side of the Transceiver Circuit, and it returns the signal to its normal condition. 25/02/2013 Bahman R. Alyaei

Continue… This is done by favoring low-level speech over higher-level speech. Hence, more code segments are assigned to speech bursts at low level than at the higher levels, progressively more as level goes down. 25/02/2013 Bahman R. Alyaei

Continue… A simple graphic representation of compression. Six-bit coding, eight six bit sequences per segment. 25/02/2013 Bahman R. Alyaei

Continue… The figure in the previous slide explains the non-linear quantization process, where each sample is encoded with k = 6-bits. The total number of levels L = 2k = 256. Note that eight coded sequences are assigned to each level grouping. The smallest range rises only 0.0666 V from the origin (0 V). The largest range extends over 0.5 V, and it is assigned only eight coded sequences. 25/02/2013 Bahman R. Alyaei

Continue… There are two types of Non-linear Qunatizers: A-law: European. where x is the signal input amplitude and A = 87. 6 for E1 system 25/02/2013 Bahman R. Alyaei

A-law used for companding in Europe 25/02/2013 Bahman R. Alyaei

The 13-segment approximation of the A -law curve used with E1 PCM equipment 25/02/2013 Bahman R. Alyaei

Continue… The figure in the previous slide shows the companding curve and resulting coding for the European E1 system. Note that the curve consists of linear piecewise segments, seven above and seven below the origin. The segment just above and the segment just below the origin each consists of two linear elements. 25/02/2013 Bahman R. Alyaei

Continue… Counting the collinear elements by the origin, there are 16 segments. Each segment has 16, 8-bit PCM codewords assigned. These are the codewords that identify the voltage level of a sample at some moment in time. The first bit (MSB) tells the distant-end receiver if that sample is a positive or a negative voltage. 25/02/2013 Bahman R. Alyaei

Continue… Note that all the PCM words above the origin start with a binary 1, and those below the origin start with a binary 0. The next three bits identify the segment. There are 8 segments above the origin and 8 below (23 = 8). The last 4 bits, shown in the figure as XXXX, identify where in the segment that voltage line is located. 25/02/2013 Bahman R. Alyaei

Continue… Example: the code word 11010100 is +ve and located in segment 4. The European E1 system, coding of segment 4 (positive) 25/02/2013 Bahman R. Alyaei

Continue… µ-law: North American. Where x is the signal input amplitude and µ = 255 for DS1 system (New). µ = 100 for T1 system (Old). 25/02/2013 Bahman R. Alyaei

μ-Law used for companding in the United Sates. 25/02/2013 Bahman R. Alyaei

Piecewise linear approximation of the µ-law logarithmic curve 25/02/2013 Bahman R. Alyaei

Continue… The figure in the previous slide shows an equivalent logarithmic curve for the North American DS1 system. It uses a 15-segment approximation of the logarithmic µ -law curve (µ = 255). The segments cutting the origin are collinear and are counted as one. 25/02/2013 Bahman R. Alyaei

Continue… The first code element (MSB), indicates to the distant end whether the sample voltage is positive or negative. The next three elements (bits) identify the segment. The last four elements (bits) identify the actual quantum level inside the segment. 25/02/2013 Bahman R. Alyaei

Eight-level coding of the North American DS1 PCM system Eight-level coding of the North American DS1 PCM system. Note that there are actually only 255 quantizing steps because steps 0 and 1 use the same bit sequence, thus avoiding a code sequence with no transitions (i.e., all 0s) 25/02/2013 Bahman R. Alyaei

3 PCM Codec or TDM System Codec is a contraction of the word group Coder–Decoder. Codec: is a TDM transceiver. Codec accepts multiple voice channels. It digitizes (ADC) and multiplexes the information; and delivers a serial bit stream to the trunk line or link. 25/02/2013 Bahman R. Alyaei

Continue… It receives voice signals from the telephone sets in the local network through the subscriber loop. It also accepts a serial bit stream from the link, demultiplexes the digital information, and performs Digital-to-Analog Conversion (DAC). 25/02/2013 Bahman R. Alyaei

Simplified functional block diagram of a PCM codec or TDM system 25/02/2013 Bahman R. Alyaei

Continue… The voice channel to be transmitted is passed through a 3.4-kHz LPF. The output of the LPF is fed to a S/H Circuit to generate PAM signal. The PAM signal (PAM highway) fed to a Channel Gate Circuit. The release of the PAM highway samples is under the control of the Channel Gate which is controlled by a pulse derived from the transmit clock. 25/02/2013 Bahman R. Alyaei

Continue… The input to the Coder is the PAM highway. It accepts a sample of each (n) channel gate in sequence and then generates the appropriate 8-bit signal character corresponding to each sample, which is the basic PCM signal. 25/02/2013 Bahman R. Alyaei

Continue… The coder output (n PCM signals) is fed to the Digit Combiner where framing-alignment signals and necessary supervisory signaling digits corresponding to each channel are inserted in the appropriate time slots. On the receive side, the Codec accepts the serial PCM bit stream through the Digit Separator. 25/02/2013 Bahman R. Alyaei

Continue… At the Digit Separator, the n signals are regenerated and split, delivering the PCM signal to four locations to carry out the following processing functions: Timing recovery, Decoding, Frame alignment, Signaling (supervisory). 25/02/2013 Bahman R. Alyaei

Continue… Timing Recovery keeps the receive clock in synchronism with the far-end transmit clock. The receive clock provides the necessary gating pulses for the receive side of the PCM Codec. The Frame-Alignment Circuit senses the presence of the frame-alignment signal at the correct time interval, thus providing the receive terminal with frame alignment. 25/02/2013 Bahman R. Alyaei

Continue… The Decoder, under control of the receive clock, decodes the code character signals corresponding to each channel. The output of the Decoder is the reconstituted pulses making up a PAM highway. The Channel Gate accepts the PAM highway, gating the n-channel PAM highway in sequence under control of the receive clock. 25/02/2013 Bahman R. Alyaei

Continue… The output of the Channel Gate is fed in turn to each channel filter, thus enabling the reconstituted analog voice signal to reach the appropriate voice path. Gating pulses extract signaling information in the signaling processor and apply this information to each of the reconstituted voice channels with the supervisory signaling interface as required by the analog telephone system in question. 25/02/2013 Bahman R. Alyaei

Continue… There are two varieties of PCM Codec: The North American, called DS1 or T1. The European, called E1. Both DS1 and E1 are TDM systems. The frame duration of E1 and DS1 is Tf = 1/fs = 1/8000 = 125 μS. 25/02/2013 Bahman R. Alyaei

4 E1 System 25/02/2013 Bahman R. Alyaei

Multiframe for E1 carrier 25/02/2013 Bahman R. Alyaei

Continue… E1 PCM system is a 32-channel system. One frame = 32-channels. Each channel consists of 8-bits. We say that, each channel is allotted an 8-bit time slot (TS), TS0 through TS31. Total No. of TS per frame = 32. TS = Ts/Total no. of channels = 125μ/32 = 3.906 μS. 25/02/2013 Bahman R. Alyaei

Continue… The total no. of bits per E1 frame is Total no. of bits = 8×32 = 256 bits. The E1 bit rate to the line is Rb = 256×8000 = 2.048 Mbps. Of the 32 channels (32 TS): 30 channels transmit speech (or data) derived from incoming telephone trunks The remaining 2 channels transmit synchronization-alignment and signaling information. 25/02/2013 Bahman R. Alyaei

Continue… E1 can be adapted for CCS, providing 31 data channels and employing a single synchronization channel,  and  the signaling protocol being transmitted on a different physical channel. (Today) 25/02/2013 Bahman R. Alyaei

Continue… In TS0, a synchronizing code or word which is called Frame Alignment Word (FAW) is transmitted every second frame, occupying digits 2 through 8 as follows: *0011011. This allows the receiver to lock onto the start of each frame and match up each channel in turn. 25/02/2013 Bahman R. Alyaei

Continue… For the alignment mechanism to be maintained, the FAW does not need to be transmitted in every frame, only even frames. In those frames (odd frames) without the synchronizing word called Frame Service Word (FSW), the second bit of TS0 is frozen at a 1 so that in these frames the synchronizing word cannot be imitated (mimicked). 25/02/2013 Bahman R. Alyaei

Continue… It is therefore available for other functions, such as the transmission of the Alarms and Supervisory Signals. An alarm must be sent to the transmitter when a device detects any of the following at the Multiplexer A power failure. A failure of the codec. Demultiplexer: Loss of the signal. Loss of frame alignment. BER greater than 10−3. 25/02/2013 Bahman R. Alyaei

Continue… The remaining bits in positions 4 to 8 (Spare bits) of TS0 (odd frames) can be used in a number of ways, such as Transmission of supervisory information signals between exchanges. In specific point-to-point applications To establish a data link based on messages for operations management Maintenance or monitoring of the transmission quality, and so on. 25/02/2013 Bahman R. Alyaei

Continue… E1 allow for a full Cyclic Redundancy Check (CRC) to be performed across all bits transmitted in each frame, to detect if the circuit is losing bits (information), but this is not always used. TS16 is used to carry the call-control signaling between the exchanges at either end of the PCM route. 25/02/2013 Bahman R. Alyaei

Continue… Framing and basic timing should be distinguished. Framing: ensures that the PCM receiver is aligned regarding the beginning and end of a bit sequence or frame. Timing: refers to the synchronization of the receiver clock, specifically, that it is in step with its companion far-end transmit clock. 25/02/2013 Bahman R. Alyaei

4.1 Enhancements to E1 In order to enhance signaling information (dial pulses) for all 30 channels to be transmitted, the concept of Multiframe is introduced. The Multiframe consists of 16 frames numbered 0-15. A Multiframe is divided into two parts: Sub-multiframe I (SMF-I): frames 0-7. Sub-multiframe II (SMF-II): frames 8-15. 25/02/2013 Bahman R. Alyaei

Continue… In Frame 0, TS16 contains the Multiframe Alignment Word (MFAW) and Multiframe Service Word (MFSW). In Frames 1-15, TS16 contains signalling information for two channels. The duration of each Multiframe is 2 mS (125 µS x 16). 25/02/2013 Bahman R. Alyaei

5 Digital Signal 1 (DS1) DS1 signal format 25/02/2013 Bahman R. Alyaei

Continue… DS1 PCM system is a 24-channel system. One frame = 24-channels. Each channel consists of 8-bits. We say that, each channel is allotted an 8-bit time slot (TS), TS1 through TS24. Total No. of TS per frame = 24. TS = (8)(Ts/Total no. of bits per frame) = (8)(125μ/193) = 5.181 μS. 25/02/2013 Bahman R. Alyaei

Continue… The DS1 signal format, has one bit added as a framing bit called an “S” bit for synchronization. The total no. of bits per DS1 frame is Total no. of bits = 8×24 + 1 = 193 bits. The DS1 bit rate to the line is Rb = 193×8000 = 1.544 Mbps. In DS1, all the 24 channels are used to transmit speech (or data) derived from incoming telephone trunks. 25/02/2013 Bahman R. Alyaei

Frame structure of North American DS1 PCM system channel bank If bits 1 to 6 and 8 are 0, then bit 7 is transmitted as binary 1 Frame structure of North American DS1 PCM system channel bank 25/02/2013 Bahman R. Alyaei

Continue… Supervisory signaling is “in-band” where bit 8 of every sixth frame is “robbed” for supervisory signaling. On each frame that has bit 8 “robbed” 7-bit coding is used versus 8-bit coding used on the other five frames. Thus each equivalent voice channel carries its own signaling 25/02/2013 Bahman R. Alyaei

5.1 Enhancement to DS1 A Superframe (Multiframe) consists of 12 consecutive frames. Hence, we have developed 12 S-bits and they all are used for frame alignment/synchronization. Thus, there is a 12-bit sequence, one S-bit frame from each frame. 25/02/2013 Bahman R. Alyaei

Continue… This 12-bit sequence is subdivided into two sequences: The frame alignment pattern is 101010 and is located in the odd-numbered frames. The Superframe-alignment pattern is 001110 and is located in the even-numbered frames. 25/02/2013 Bahman R. Alyaei

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Superframe for DS1 25/02/2013 Bahman R. Alyaei

6 PCM Line Codes For E1 trunks, the line coding is always HDB3 (High-Density Bipolar Order 3). There are four rules for HDB3 coding: More than three consecutive zeros are not allowed. For the fourth ‘0’ introduce a Violation bit. Violation bit has to be of the same polarity as the previous mark ‘1’. 25/02/2013 Bahman R. Alyaei

Continue… Two consecutive violation bits has to be of opposite polarity. If the number of marks between two consecutive violation bits is even the format should be B00V where B is a stuffing bit and of opposite polarity to the previous mark. If the number of marks is an odd number the format should be 000V. 25/02/2013 Bahman R. Alyaei

Continue… 25/02/2013 Bahman R. Alyaei

Continue… 25/02/2013 Bahman R. Alyaei

Continue… In DS1, Bipolar with Eight-Zero Substitution (B8ZS) line code is used. In DS2, Bipolar with Six-Zero Substitution (B6ZS) line code is used. 25/02/2013 Bahman R. Alyaei

7 Synchronization of Digital Signals We can classify Higher-Order PCM Multiplexing Systems (Hierarchy) according to Data Signals Synchronization into three categories: Synchronous. Plesiochronous. Asynchronous. 25/02/2013 Bahman R. Alyaei

7.1 Synchronous In a set of Synchronous signals, the digital transitions in the signals occur at exactly the same rate. There may however be a phase difference due to network propagation time delay between the transitions of the two signals, and this would lie within specified limits. In a synchronous network, all the clocks are traceable to one Primary Reference Clock (PRC). The accuracy of the PRC is better than ±1 in 1011 and is derived from a cesium atomic standard. 25/02/2013 Bahman R. Alyaei

7.2 Plesiochronous If two digital signals are Plesiochronous, their transitions occur at “almost” the same rate, with any variation being constrained within tight limits. For example, if two networks need to inter-work, their clocks may be derived from two different PRCs. Although these clocks are extremely accurate, there’s a small frequency difference between one clock and the other. 25/02/2013 Bahman R. Alyaei

7.3 Asynchronous In the case of Asynchronous signals, the transitions of the signals don’t necessarily occur at the same nominal rate. Asynchronous, in this case, means that the difference between two clocks is much greater than a Plesiochronous difference. For example, if two clocks are derived from free-running quartz oscillators, they could be described as Asynchronous. 25/02/2013 Bahman R. Alyaei

8 Higher Order PCM Multiplex Systems Primary multiplex is typically E1 in Europe and DS1 in North America. Higher-order PCM multiplex is developed out of several primary multiplex sources. There are two PCM multiplexing systems: Plesiochronous Digital Hierarchy (PDH). SDH/SONET. 25/02/2013 Bahman R. Alyaei

9 PDH In PDH, Stuffing or Justification bits are required. Stuffing bits are extra frame alignment bits (word) introduced by the Higher-Order Multiplexer after buffering. As a result, the output of the Higher-Order Multiplexer is slightly faster than the original rate of the multiplexed signal. Therefore, bits at the output of PDH multiplexer buffer must be read at a rate slightly faster than the input. 25/02/2013 Bahman R. Alyaei

Continue… Hence, each Higher-Order Multiplexer needs its own primary clock. Therefore, this type of Higher-Order Multiplexing is called Plesiochronous Digital Hierarchy (PDH). PDH is bit by bit multiplexing scheme (Bit Interleaving). 25/02/2013 Bahman R. Alyaei

Continue… Bit Interleaving is simpler than Byte Interleaving because it is independent of frame structure and also requires less memory capacity. There are two PDH systems: European PDH system. North American PDH system 25/02/2013 Bahman R. Alyaei

Continue… Interleaving digital signals, a) Bit interleaving, b) Word interleaving (word length = 3 bits) 25/02/2013 Bahman R. Alyaei

European Plesiochronous Digital Hierarchy 9.1 European PDH System E1 E2 E3 E4 European Plesiochronous Digital Hierarchy 25/02/2013 Bahman R. Alyaei

9.2 North American PDH System American Plesiochronous Digital Hierarchy 25/02/2013 Bahman R. Alyaei

9.3 Disadvantages of PDH It is plesiochronous. Not only E1 and DS1 are incompatible, the Higher-Order Multiplexers are also incompatible, specialized interface equipment is required to inter-work the two hierarchies. To recover a 64 kbps channel from a 140 Mbps (E4) PDH signal, it’s necessary to demultiplex the signal all the way down to the 2 Mbps level (E1) before the location of the 64 kbps channel can be identified (add and drop), due to Bit Interleaving concept. 25/02/2013 Bahman R. Alyaei

9.4 Digital Loop Carrier (DLC) DLC Is a system which uses digital transmission to extend the range of the local loop farther than would be possible using only twisted pair copper wires. DLC is one method of extending the metallic subscriber plant by using one or more E1 or DS1 configurations. A DLC digitizes and multiplexes the individual signals carried by the local loops onto a single data stream on the DLC segment. 25/02/2013 Bahman R. Alyaei

Continue… As an example, the Single Loop Carrier SLC-120 employs four E1 configurations to derive an equivalent 120 voice channels. Another example, the SLC-96 employs four DS1 configurations to derive an equivalent 96 voice channels. The digital transmission facility used by a DLC system may be repeated wire-pair cable, optical fibers, either or both combined with digital multiplexers, or other appropriate media. 25/02/2013 Bahman R. Alyaei

Continue… Digital Loop Carrier Systems 25/02/2013 Bahman R. Alyaei

Digital Loop Carrier System and Terminal Continue… Digital Loop Carrier System and Terminal 25/02/2013 Bahman R. Alyaei