1 TSD-160 Introduction to Network Analyzers and Error Correction Doug Rytting 4804 Westminster Place Santa Rosa, CA

2 Agenda Block Diagram Improvements with Error Correction 3-Term Error Model 12-Term Error Model 16-Term Error Model 8-Term Error Model Switch Correction Miltiport Error Model Accuracy of Error Correction

3 Network Analyzer Block Diagram

4 Improvement with Correction

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7 One Port: 3-Term Error Model

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9 12-Term Error Model

10 12-Term Error Model

11 12-Term Error Model

12 12-Term Error Model

13 12-Term Error Model

14 12-Term Error Model

15 16-Term Error Model

16 16-Term Error Model

17 16-Term Error Model

18 8-Term Error Model

19 8-Term Error Model

20 8-Term Error Model

21 8-Term Error Model

22 8-Term Error Model

23 8-Term Calibration Examples

24 Switch Correction

25 Switch Correction

26 Multiport Error Model

27 Accuracy of Error Correction

28 Accuracy of Error Correction Residual Errors OSL Fixed Load OSL Sliding Load TRLTRM Directivity  -40 dB-52 dB-60 dB-40 dB Match  -35 dB-41 dB-60 dB-40 dB Reflection Tracking  ±.1 dB±.05 dB±.01 dB APC-7 (7 mm Coax) at 18 GHz

29 Accuracy of Error Correction

30 Accuracy of Error Correction

31 Vector Network Analyzer References

32 Doug Rytting Biography