Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. UPPAAL’s Modeling and Specification Language & Philips Bounded Retransmission.

Slides:



Advertisements
Similar presentations
The Quest for Correctness Joseph Sifakis VERIMAG Laboratory 2nd Sogeti Testing Academy April 29th 2009.
Advertisements

Clocked Mazurkiewicz Traces and Partial Order Reductions for Timed Automata D. Lugiez, P. Niebert, S. Zennou Laboratoire d Informatique Fondamentale de.
McGill University School of Computer Science COMP 763 Ph.D. Student in the Modelling, Simulation and Design Lab Eugene Syriani 1.
Timed Automata Rajeev Alur University of Pennsylvania SFM-RT, Bertinoro, Sept 2004.
UCb Kim Guldstrand Larsen Symbolic Model Checking …and Verification Options How UPPAAL really works & How to make UPPAAL really work.
Real-Time Systems, DTU, Feb 15, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Timed Automata and Timed Computation Tree Logic Paul Pettersson
UCb Symbolic Reachability and Beyound or how UPPAAL really works Kim Guldstrand Larsen
Dependable Embedded Software Systems Kim Guldstrand Larsen UCb.
Hybrid automata - Abstraction Anders P. Ravn Department of Computer Science, Aalborg University, Denmark Hybrid Systems – PhD School Aalborg University.
1 Logics & Preorders from logic to preorder – and back Kim Guldstrand Larsen Paul PetterssonMogens Nielsen
nearly Formal Methods Automatic Validation and Verification Tools
1 COMP541 More on State Machines and Video Scanout Montek Singh Feb 13, 2007.
Chapter 16 : KRONOS (Model Checking of Real-time Systems)
CSE 202 – Formal Languages and Automata Theory 1 REGULAR LANGUAGE.
UPPAAL Introduction Chien-Liang Chen.
Timed Automata.
UPPAAL T-shirt to (identifiable)
Introduction to Uppaal ITV Multiprogramming & Real-Time Systems Anders P. Ravn Aalborg University May 2009.
Modelling and Analysis of Real Time Systems Kim Guldstrand Larsen UPPAAL2k using UPPAAL2k.
UPPAAL Andreas Hadiyono Arrummaisha Adrifina Harya Iswara Aditya Wibowo Juwita Utami Putri.
CSE 522 UPPAAL – A Model Checking Tool Computer Science & Engineering Department Arizona State University Tempe, AZ Dr. Yann-Hang Lee
Compatibility between shared variable valuations in timed automaton network model- checking Zhao Jianhua, Zhou Xiuyi, Li Xuandong, Zheng Guoliang Presented.
Hybrid Approach to Model-Checking of Timed Automata DAT4 Project Proposal Supervisor: Alexandre David.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Reachability, Schedulability and Optimality
1 Modelling and Validation of Real Time Systems Kim Guldstrand Larsen Paul Pettersson
EECE Hybrid and Embedded Systems: Computation T. John Koo, Ph.D. Institute for Software Integrated Systems Department of Electrical Engineering and.
Sanjit A. Seshia and Randal E. Bryant Computer Science Department
CaV 2003 CbCb 1 Concurrency and Verification What? Why? How?
Assertions in OpenVera Assertions check for the occurrence of sequences during simulation Sequence is an ordered (maybe timed) series of boolean events.
Hybrid automata Rafael Wisniewski Automation and Control, Dept. of Electronic Systems Aalborg University, Denmark Hybrid Systems October 9th 2009.
Abstract Verification is traditionally done by determining the truth of a temporal formula (the specification) with respect to a timed transition system.
1 Efficient Verification of Timed Automata Kim Guldstrand Larsen Paul PetterssonMogens Nielsen
ECE/CS 584: Hybrid Automaton Modeling Framework Executions, Reach set, Invariance Lecture 03 Sayan Mitra.
Timed UML State Machines Ognyana Hristova Tutor: Priv.-Doz. Dr. Thomas Noll June, 2007.
1 COMP541 State Machines Montek Singh Feb 8, 2012.
UPPAAL Ghaith Haddad. Introduction UPPAAL is a tool for modeling, validation and verification of real-time systems. Appropriate for systems that can be.
ULB, November 2004 As cheap as possible: Linearly Priced Timed Automata Gerd Behrmann, Ed Brinksma, Ansgar Fehnker, Thomas Hune, Kim Larsen, Paul Pettersson,
Transformation of Timed Automata into Mixed Integer Linear Programs Sebastian Panek.
Henrik Schiøler Konstruktion, modellering og validering af sikkerhedskritiske SW systemer.
CEFRIEL Consorzio per la Formazione e la Ricerca in Ingegneria dell’Informazione Politecnico di Milano Model Checking UML Specifications of Real Time Software.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Lecture51 Timed Automata II CS 5270 Lecture 5.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Finite Automata (Finite State Machines). Basic Structure u A black box with a number of input and output ports. u Synchronous operation (discrete sampling)
1 Outline:  Optimization of Timed Systems  TA-Modeling of Scheduling Tasks  Transformation of TA into Mixed-Integer Programs  Tree Search for TA using.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Synchronous Protocol Automata. Formal definitions Definition 1 A synchronous protocol automaton P is defined as a tuple (Q,S,D,V,A,->,clk,q0,qf) Channels.
Construction of Abstract State Graphs with PVS Susanne Graf and Hassen Saidi VERIMAG.
1 Model Checking of of Timed Systems Rajeev Alur University of Pennsylvania.
Analysis and Synthesis of Synchronous Sequential Circuits A “synchronizing” pulse/edge signal (clock) controls the operation of the memory portion of the.
Event-Clock Visibly Pushdown Automata Mizuhito Ogawa (JAIST) with Nguyen Van Tang SOFSEM
Same Signs Different Signs 1) =+7 Objective- To solve problems involving operations with integers. Combining.
CSE 202 – Formal Languages and Automata Theory 1 REGULAR EXPRESSION.
Classifying fault-tolerance Masking tolerance. Application runs as it is. The failure does not have a visible impact. All properties (both liveness & safety)
CS5270 Lecture 41 Timed Automata I CS 5270 Lecture 4.
1 COMP541 Sequential Logic – 2: Finite State Machines Montek Singh Feb 29, 2016.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Fall 2004COMP 3351 Finite Automata. Fall 2004COMP 3352 Finite Automaton Input String Output String Finite Automaton.
UPPAAL Real-Time Systems Lab. Seolyoung, Jeong.
Probabilistic Timed Automata
SS 2017 Software Verification Timed Automata
Lecture 4. Sequential Logic #2
TIOA-to-UPPAAL Translator & Front-End Integration
Timed Automata II CS 5270 Lecture Lecture5.
Instructor: Rajeev Alur
Timed Automata Formal Systems Pallab Dasgupta Professor,
LANGUAGE EDUCATION.
Course: CS60030 FORMAL SYSTEMS
Non Deterministic Automata
Presentation transcript:

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. UPPAAL’s Modeling and Specification Language & Philips Bounded Retransmission Protocol Paul Pettersson

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Timed Automata n m a (Alur & Dill, 1990) Clocks: x, y x 3 x := 0 Guard Boolean combination of comp with integer bounds Reset Action perfumed on clocks Transitions ( n, x=2.4, y= ) ( n, x=3.5, y= ) e(1.1) ( n, x=2.4, y= ) ( m, x=0, y= ) a State ( location, x=v, y=u ) where v,u are in R Action used for synchronization

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. n m a Clocks: x, y x 3 x := 0 Transitions ( n, x=2.4, y= ) ( n, x=3.5, y= ) e(1.1) ( n, x=2.4, y= ) e(3.2) x<=5 y<=10 Location Invariants g1 g2 g3 g4 Timed Safety Automata = Timed Automata + Invariants (Henzinger et al, 1992)

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Networks of Timed Automata + Integer Variables + arrays …. l1 l2 a! x>=2 i==3 x := 0 i:=i+4 m1 m2 a? y<=4 …………. Two-way synchronization on complementary actions. Closed Systems!

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Timed Automata in U PPAAL Timed (Safety) Automata + urgent actions + urgent locations + committed locations + data-variables (with bounded domains) + arrays of data-variables + constants + guards and assignments over data-variables and arrays… + templates with local clocks, data-variables, and constants.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Declarations in U PPAAL clock x 1, …, x n ; int i 1, …, i m ; chan a 1, …, a o ; const c 1 n 1, …, c p n p ; Examples: clock x, y; int i, J0; int[0,1] k[5]; const delay 5, true 1, false 0; Array k of five booleans.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Timed Automata in U PPAAL n m a x 3 x := 0 x<=5 y<=10 g1 g2 g3 g4 clock natural number and clock guards data guards clock assignments location invariants

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Urgent Channels urgent chan hurry; Informal Semantics: There will be no delay if transition with urgent action can be taken. Restrictions: No clock guard allowed on transitions with urgent actions. Invariants and data-variable guards are allowed.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Urgent Locations Click “Urgent” in State Editor. Informal Semantics: No delay in urgent location. Note: the use of urgent locations reduces the number of clocks in a model, and thus the complexity of the analysis.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Committed Locations Click “Committed” in State Editor. Informal Semantics: No delay in committed location. Next transition must involve automata in committed location. Note: the use of committed locations reduces the number of clocks in a model, and allows for more space and time efficient analysis.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. UPPAAL Specification Language A[] p (AG p) E<> p (EF p) p::= a.l | g d | g c | p and p | p or p | not p | p imply p | ( p ) clock guardsdata guardsprocess location

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Philips Bounded Retransmission Protocol [D’Argenio et.al. 97]

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Protocol Overview Protocol developed by Philips. Transfer data between Audio/Video components via infra-red communication. Data files sent in smaller chunks. Problem: Unreliable communication medium. Sender retransmit if receiver respond too late. Receiver abort if sender sends too late.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Overview of BRP SenderReceiver SR K L Input: file = p 1, …, p n lossy Output: p 1, …, p n BRP pipi ack

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. How It Works Sender input: file = p 1, …, p n. S sends (p 1, FST, 0 ), (p 2, INC, 1 ), …, (p n-1, INC, 1 ), (p n, OK, 0 ). R sends: ack, …, ack. S retransmits p i if timeout. Receiver recives: p 1, …, p n. Sender and Receiver receives NOK or OK. whole file OK more parts will follow first part of file

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. BRP Model Overview SenderReceiver SR K L Input: file = p 1, …, p n ack (p i,INDication,abit ) lossy ok, nok, dk IND, ok, nok Output: p 1, …, p n BRP

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. The Lossy Media value-passing lossy = may drop messages one-place capacity delay

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Bounded Retransmission S sends a chunk pi and waits for ack from R. If timeout the chunk is retransmitted. If too many timeout the transmission fails ( NOK is sent to Sender ). If whole file successfully sent OK is sent to Sender. Receiver is similar.

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Process S

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. Process R

Real-Time Systems, DTU, Feb 29, 2000 Paul Pettersson, BRICS, Aalborg, Denmark. The Sender and Receiver