1 Software Model Checking Andrey Rybalchenko Slides partly by Rupak Majumdar.

Slides:



Advertisements
Similar presentations
1 Verification by Model Checking. 2 Part 1 : Motivation.
Advertisements

Thursday, November 1, 2001(c) 2001 Ibrahim K. El-Far. All rights reserved.1 Enjoying the Perks of Model-based Testing Ibrahim K. El-Far Florida Institute.
Program Verification using Probabilistic Techniques Sumit Gulwani Microsoft Research Invited Talk: VSTTE Workshop August 2006 Joint work with George Necula.
The Quest for Correctness Joseph Sifakis VERIMAG Laboratory 2nd Sogeti Testing Academy April 29th 2009.
Program Analysis using Random Interpretation Sumit Gulwani UC-Berkeley March 2005.
Constraint Satisfaction Problems
Analysis of Computer Algorithms
Sugar 2.0 Formal Specification Language D ana F isman 1,2 Cindy Eisner 1 1 IBM Haifa Research Laboratory 1 IBM Haifa Research Laboratory 2 Weizmann Institute.
Copyright 2000 Cadence Design Systems. Permission is granted to reproduce without modification. Introduction An overview of formal methods for hardware.
Copyright 2000 Cadence Design Systems. Permission is granted to reproduce without modification. Conclusion Summary Research trends Resources.
1 Verification of Infinite State Systems by Compositional Model Checking Ken McMillan Cadence Berkeley Labs.
Requirements Engineering Process
Automated Theorem Proving Lecture 1. Program verification is undecidable! Given program P and specification S, does P satisfy S?
Jeopardy Q 1 Q 6 Q 11 Q 16 Q 21 Q 2 Q 7 Q 12 Q 17 Q 22 Q 3 Q 8 Q 13
Jeopardy Q 1 Q 6 Q 11 Q 16 Q 21 Q 2 Q 7 Q 12 Q 17 Q 22 Q 3 Q 8 Q 13
Tintu David Joy. Agenda Motivation Better Verification Through Symmetry-basic idea Structural Symmetry and Multiprocessor Systems Mur ϕ verification system.
Auto-Generation of Test Cases for Infinite States Reactive Systems Based on Symbolic Execution and Formula Rewriting Donghuo Chen School of Computer Science.
Configuration management
1 Verification of Parameterized Systems Reducing Model Checking of the Few to the One. E. Allen Emerson, Richard J. Trefler and Thomas Wahl Junaid Surve.
Testing Workflow Purpose
The Modular Structure of Complex Systems Team 3 Nupur Choudhary Aparna Nanjappa Mark Zeits.
April 30, A New Tool for Designer-Level Verification: From Concept to Reality April 30, 2014 Ziv Nevo IBM Haifa Research Lab.
1 Breadth First Search s s Undiscovered Discovered Finished Queue: s Top of queue 2 1 Shortest path from s.
Lecture 1: Software Engineering: Introduction
Lecture plan Outline of DB design process Entity-relationship model
Executional Architecture
Chapter 10: The Traditional Approach to Design
Systems Analysis and Design in a Changing World, Fifth Edition
Catching Bugs in Software Rajeev Alur Systems Design Research Lab University of Pennsylvania
Chapter 12 Analyzing Semistructured Decision Support Systems Systems Analysis and Design Kendall and Kendall Fifth Edition.
From Model-based to Model-driven Design of User Interfaces.
M ODEL CHECKING -Vasvi Kakkad University of Sydney.
CS 267: Automated Verification Lecture 8: Automata Theoretic Model Checking Instructor: Tevfik Bultan.
Introducing Formal Methods, Module 1, Version 1.1, Oct., Formal Specification and Analytical Verification L 5.
Automatic Verification Book: Chapter 6. What is verification? Traditionally, verification means proof of correctness automatic: model checking deductive:
Abstraction and Modular Reasoning for the Verification of Software Corina Pasareanu NASA Ames Research Center.
Verification of Hybrid Systems An Assessment of Current Techniques Holly Bowen.
Thomas Ball, Rupak Majumdar, Todd Millstein, Sriram K. Rajamani Presented by Yifan Li November 22nd In PLDI 01: Programming Language.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Software Reliability CIS 640 Adapted from the lecture notes by Doron Pelel (
1 Formal Methods in SE Qaisar Javaid Assistant Professor Lecture 05.
Demonstration Of SPIN By Mitra Purandare
Formal Methods in Software Engineering Credit Hours: 3+0 By: Qaisar Javaid Assistant Professor Formal Methods in Software Engineering1.
CSEP590 – Model Checking and Software Verification University of Washington Department of Computer Science and Engineering Summer 2003.
Software Engineering: Where are we? And where do we go from here? V Software Engineering Lecture 23 Clark Barrett New York University 4/17/2006.
Model Checking. Used in studying behaviors of reactive systems Typically involves three steps: Create a finite state model (FSM) of the system design.
Programming Language Semantics Mooly SagivEran Yahav Schrirber 317Open space html://
Embedded Systems Laboratory Department of Computer and Information Science Linköping University Sweden Formal Verification and Model Checking Traian Pop.
Semantics with Applications Mooly Sagiv Schrirber html:// Textbooks:Winskel The.
School of Computer ScienceG53FSP Formal Specification1 Dr. Rong Qu Introduction to Formal Specification
1 Formal Engineering of Reliable Software LASER 2004 school Tutorial, Lecture1 Natasha Sharygina Carnegie Mellon University.
Formal verification Marco A. Peña Universitat Politècnica de Catalunya.
Formal Verification of SpecC Programs using Predicate Abstraction Himanshu Jain Daniel Kroening Edmund Clarke Carnegie Mellon University.
MCAI 2.0 Model Checking in Ten Minutes Edmund Clarke School of Computer Science Carnegie Mellon University.
Lecture 1: Model Checking
Cheng/Dillon-Software Engineering: Formal Methods Model Checking.
B. Fernández, D. Darvas, E. Blanco Formal methods appliedto PLC code verification Automation seminar CERN – IFAC (CEA) 02/06/2014.
Framework for the Development and Testing of Dependable and Safety-Critical Systems IKTA 065/ Supported by the Information and Communication.
1 Introduction to Software Engineering Lecture 1.
1 Predicate Abstraction and Refinement for Verifying Hardware Designs Himanshu Jain Joint work with Daniel Kroening, Natasha Sharygina, Edmund M. Clarke.
- 1 -  P. Marwedel, Univ. Dortmund, Informatik 12, 05/06 Universität Dortmund Validation - Formal verification -
Verification & Validation By: Amir Masoud Gharehbaghi
Welcome to CS 477 Formal Methods in Software Development Spring 2011 Madhusudan Parthasarathy ( Madhu )
Static Techniques for V&V. Hierarchy of V&V techniques Static Analysis V&V Dynamic Techniques Model Checking Simulation Symbolic Execution Testing Informal.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Survey on the Formal Verification Dept. of Nuclear and Quantum Engineering NICIEL Myung Jun Song.
Presentation Title 2/4/2018 Software Verification using Predicate Abstraction and Iterative Refinement: Part Bug Catching: Automated Program Verification.
Formal Methods: Model Checkers and Theorem Provers
Presentation transcript:

1 Software Model Checking Andrey Rybalchenko Slides partly by Rupak Majumdar

2 Why verify software? Most complicated artifact routinely built today – difficult to get right Horror stories

3

4

5

6 Why verify software? Most complicated artifact routinely built today – difficult to get right Employed everywhere Failures are costly cost $59.5 billion annually (US) » 0.6% gross domestic product (US) 80% of development costs on identifying and correcting defects [NIST, 2002]

7 Formal Verification Formal verification means to apply mathematical arguments to prove the correctness of systems Systems have bugs –Formal verification aims to find and correct such bugs

8 What is formal verification? Build a mathematical model of the system: –what are possible behaviors? Write correctness requirements in a specification language: –what are desirable behaviors? Analysis: (Automatically) check that model satisfies specification Formal ) Correctness claim is a precise mathematical statement Verification ) Analysis either proves or disproves the correctness claim

9 Alternative Approaches Testing: Run the system on select inputs Simulation: Simulate a model of the system on select inputs Interactive theorem proving: Formulate system correctness as a theorem in a suitable logic

10 Algorithmic Analysis Algorithmic analysis (computer-aided verification) –Analysis is performed by an algorithm (tool) –Analysis gives counterexamples for debugging –Typically requires exhaustive search of state-space –Limited by high computational complexity Interactive verification –Analysis reduces to proving a theorem in a logic –Uses interactive theorem prover –Requires more expertise

11 Model Checking Coined by Clarke and Emerson (1981) to mean checking a concurrent finite state model with respect to properties in CTL More generally, denotes algorithmic analysis to check that a model (not necessarily finite state) satisfies a specified property –In logic, “model” denotes a structure over which formulas are interpreted –“Model checking” checks (preferably automatically) whether a given formula holds in a given model

12 Why study verification? General approach to improving reliability of systems –Hardware, systems software, embedded control systems, network protocols, networked embedded systems, … Increasing industrial interest –All major hardware companies employ in-house verification groups: Intel, Motorola, AMD, Lucent, IBM, Fujitsu, … –Tools from major EDA players: Synopsys Magellan, FormalCheck –Bunch of start-ups: Calypto, Jasper, 0-In –SDV tool from Microsoft

13 Why study verification? Interesting theoretical issues –Automata theory and formal languages –Logics and decidability –Algorithms and data structures –Mathematical foundations for concurrency and semantics Interesting practical and engineering issues –Better heuristics to combat high complexity –Scale to “real systems” –Integrating reliability with design

14 Where is Verification Used? Hardware verification –Success in verifying microprocessor designs, ISAs, cache coherence protocols –Fits in design flow –Tools: SMV, nuSMV, VIS, Mocha, FormalCheck Protocol verification –Network/Communications protocol implementations –Tools: Spin Software verification –Apply directly to source code (e.g., device drivers) –Tools: SLAM, Blast, Magic Embedded and real time systems –Tools: Uppaal, HyTech, Kronos, Charon

15 ARMC (Abstraction Refinement Model Checker) Experimental prototype at MPI for Software Systems Termination proofs for arithmetic programs Used in industrial/academic projects: –termination of Vamos kernel functions (bmbf Verisoft) –termination of list/tree manipulating programs (Paris 7, Verimag)

16 ARMC (Abstraction Refinement Model Checker) Experimental prototype at MPI for Software Systems Safety proofs for arithmetic programs Used in industrial/academic projects: –memory safety of heap-manipulating programs (CMU, MSR Cambridge) –collision avoidance in European Train Control System (SFB AVACS) –parameterized hardware designs (Brno Tech. University)

17 Limitations of Software Verification Tools Appropriate for control-intensive applications with interesting interaction among components –Data remains a problem Decidability and complexity remains an obstacle Falsification rather than verification –Model, and not system, is verified –Only stated requirements are checked: how to capture correctness in a formal language? –Bugs in the model checker Finding suitable abstractions require expertise

18 The “Methodology” Answer Formal verification does not aim to produce mathematical certainty of correctness, but to provide a methodology that, when followed, produces more reliable and robust systems

19 A Brief History of FV 1930s: Formal verification of programs is undecidable. Oops… 1960s: [Floyd,McCarthy] Program verification –Partial vs total correctness 1970s: [Hoare, Dijkstra] Logics for programs, axiomatic semantics (connect programs to logic), logical transformations for program constructs –Small tricky programs, manually annotated and proved

20 A Brief History of FV 1970s: Progress in automated deduction related to program verification –Boyer Moore Computational Lisp –Nelson Oppen: Decision procedures for combination theories –Higher Order Logic theorem proving (LCF)

21 A Brief History of FV 1977: Pnueli introduces (linear) temporal logics as a formalism to reason about reactive programs 1981: Clarke, Emerson and Quielle Sifakis independently discover finite state temporal logic model checking –Applied to digital circuits Vardi and Wolper develop automata theoretic techniques Mid 1980s: Gerard Holzmann writes SPIN to check telecommunication protocols

22 A Brief History of FV Then came State Explosion 1987 Ken McMillan suggests symbolic model checking using BDDs –10 7 -> states and more Late 80s and early 90s: –Deal with state explosion –BDD hacks –Abstraction, modularity, symmetry

23 A Brief History of FV By 1990s: Basic theoretical questions (but one!) worked out 1990s: Emphasis on infinite state –Real time systems (timed automata) –Embedded systems (hybrid automata) –Models with stacks, queues, … 2000s: Emphasis on abstraction, implementation level checking –Back to software (SLAM, Blast) –But without or with few annotations

24 What has changed? Ambitions are lower –Look at simpler properties –Use model checking as a “better testing” tool Computers are faster

25 Model Checking, simplified program state: x = 10, y = 20, a[0] = 1, a[1] = 3,... program transition: x’ = x+1 defects safety violation: path to defect effect liveness violation: path w/o effects Programs and properties: defects and effects

26 Model Checking, Simplified Model checking » Graph traversal What makes it interesting: –The graph is huge, possibly infinite –Properties can be complicated Central Theme: Make it symbolic

27 Outline of Topics Representative software analysis and verification tools. Testing, symbolic execution, bug finding. Verification conditions, extended static checking. Invariant and ranking function generation. Abstract interpretation. Data flow analysis over finite domains. Pointer and alias analysis. Decision procedures. Predicate abstraction. Counterexample-guided abstraction refinement. Interpolation. Termination checking. Context-free reachability, summarization. Concurrency, race detection, atomicity.

28 Lecture notes Algorithms will be presented on the blackboard (+slides) Pointers to relevant papers will appear online

29 Prerequisites and Grading Prerequisites: Familiarity with basic algorithms and data structures, finite automata Grading based on homework project (30%), paper presentation (10%) and final exam (60%)

30 Projects Implementation of various components ! software model checker Implementation environment: OCaml – functional language Prolog – declarative language with constraint solving support Try to see if formal verification has a role in your research!