Inside the binary adder. Electro-mechanical relay A solid state relay is a switch that is controlled by a current. When current flows from A to B, the.

Slides:



Advertisements
Similar presentations
Date of Birth Design Problem
Advertisements

Your performance improvement partner 2/25/
Boolean Algebra Variables: only 2 values (0,1)
7B Unit 3 Finding your way Integrated skills. Millie is walking across the road.Millie is walking along the road.Sandy is walking over the bridge.Kitty.
ECE555 Lecture 8/9 Nam Sung Kim University of Wisconsin – Madison
The following 5 questions are about VOLTAGE DIVIDERS. You have 20 seconds for each question What is the voltage at the point X ? A9v B5v C0v D10v Question.
From RegentsEarth.com How to play Earth Science Battleship Divide the class into two teams, Red and Purple. Choose which team goes first. The main screen.
Advanced Concepts in Scheduling SCH02 Stephen Rando.
All about settlements A: Why are they there?
The Science of Biology The study of living things.
Created by Todd jenkins Amend This Cant Stop Progress Terminator Who am I Potpourri 100.
Created by Todd Jenkins Who am I Terms Potpourri Cause and effect Places 100 Main Screen.
Created by Todd Jenkins TermsPlaces PeoplePotpourri 100.
Created by Todd Jenkins ThingsTerms Spec. People R&R Pot- pourri 100 Strictly Business
PLAN DU COLLEGE JEAN MONNET RDC1 er étage. Prendre la feuille de papier millimétré dans le sens de la largeur :
PLAN DU COLLEGE JEAN MONNET RDC1 er étage. Prendre la feuille de papier millimétré dans le sens de la largeur :
NEXT A1B1C1D1E1F1 A4B4C4D4E4F4 A2B2C2D2E2F2 A5B5C5D5E5F5 A3B3C3D3E3F3 A6B6C6D6E6F6.
Magnetic Data Storage A computer hard drive stores your data magnetically Disk NS direction of disk motion Write Head __ Bits of information.
Magnets used to store data ? Magnet with unknown state Current N S S N 0 1.
Packet filtering using cisco access listsINET97 / track 2 # 1 packet filters using cisco access lists Fri 19 June 97.
MaizeGDB: Four Usage Cases Trent Seigfried 1, Carolyn Lawrence 1, Darwin Campbell 1, Mary Polacco 2, and Volker Brendel 1 1 Iowa State University, Ames,
Doc.: IEEE Submission January 2010 Rick Roberts (Intel)Slide 1 Project: IEEE P Working Group for Wireless Personal Area Networks.
PIM ECMP Assert draft-hou-pim-ecmp-00 IETF 80, Prague.
Internal Auditing in the Government of Ontario, Canada Stuart Campbell, CIA, CGA, CISA Director, Internal Audit Government of Ontario, Canada.
Enter. The Scene Type text here Choice A1 Text for decisions Guidelines Guideline text Click on A, B or C A B C Choice B1 Choice C1 Click on A, B or C.
4x4 4 8x LVDS on HDMI ( 8x LVDS on SMA ? ) 8x LVDS on HDMI LVDS on SMA LVTTL on Lemo NIM on Lemo LVDS on SMA 4x LVDS on SMA 4x NIM on Lemo 2x NIM on Lemo.
Logic Gate Objects This document contains various images created by Andrew C. M. Rodger, 4 October Tools used:LibreOffice Impress 3 Microsoft Powerpoint.
Agents & Intelligent Systems Dr Liz Black
Mai N. And V. AdverbsAdject.VerbsNouns
Bus 480 – Lecture 2 Transportation and Assignment models
A Decision Model Proposal for Credit Risk Rating of Companies Gökhan GENCER.
Free Macro Download from i-present.co.uk by GMARK Ltd.i-present.co.ukGMARK my text Lorem for more information :
Introduction to CAFE Yu Hen Hu September 25, 2000.
Truth Tables and Logic Gates. What are Logic Gates? Logic gates are components used in making logic circuits. Each gate has one or more inputs and produces.
Lab02 :Logic Gate Fundamentals:
Introduction to Computer Engineering ECE/CS 252, Fall 2010 Prof. Mikko Lipasti Department of Electrical and Computer Engineering University of Wisconsin.
Announcements mid-term on Thursday 12:30 – be on time. Calculators allowed (required!) No assignment due this week Assignment 6 posted on Thursday Project.
Digital logic gates.
Department of Computer and Information Science, School of Science, IUPUI CSCI 240 Digital Logic.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE Computer Technology Transistor to computer gates
Logic Circuits Situations to explain states What is a logic Gate
Logic Gates & Circuits. AND Gate Input AInput BOutput X AND Logic Gate AND Truth Table X = A. B AND Boolean Expression.
Chapter 3 Digital Logic Structures
topics Logic gates Gates types Universal gates
Computer Logic & Logic Gates Justin Champion. IITCT Contents Introduction to Logic Look at the different Logic Gates Summary.
Binomial Heaps. Heap Under most circumstances you would use a “normal” binary heap Except some algorithms that may use heaps might require a “Union” operation.
Topics Adders Half Adder Full Adder Subtracter Half Subtracter
20S Applied Math Mr. Knight – Killarney School Slide 1 Unit: Spreadsheets Lesson: SS-L4 Creating Spreadsheet Formulas Creating Spreadsheet Formulas Learning.
Graphs, representation, isomorphism, connectivity
EMS1EP Lecture 2 Electronic Circuits Dr. Robert Ross.
PH. A- What is pH? A1.pH represents the concentration of H + in a solution A2.pH = the power of Hydrogen pH = -log 10 [H + ] A3.Lower pH means higher.
Title Slide Directions:. My Jeopardy Category 1 Category 2 Category 3 Category 4 Category Final Jeopardy.
Economics (H) Chapter 1 Review Game Factors of Production Production Possibilities Goods & Services Productivity & Growth Value & Wealth MISC
A Roadmap to Restoring Computing's Former Glory David I. August Princeton University (Not speaking for Parakinetics, Inc.)
1 Performance Monitoring A Guide for Larger Local Councils (First Draft)
Web-pa – the tutors’ view Web-PA – a tutors’ view Peter Willmot (School of Mechanical and Manufacturing Engineering)
Digital Logic & Design Lecture No. 3. Number System Conversion Conversion between binary and octal can be carried out by inspection.  Each octal digit.
Painting by Numbers: Visualisation of structured IPv6-Addressing.
An Update for What Is Greater Dartmoor LEAF? A Local Action Group composed of dedicated volunteers Representing the local community Responsible.
ENGIN112 L15: Magnitude Comparator and Multiplexers October 6, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 15 Magnitude Comparators.
SOL 4.21 Patterns By, Jennifer Sagendorf ITRT-Suffolk Public Schools.
( ( ) quantum bits conventional bit
RN Leaving/Staying at Bedside HSCI 730 SPRING 2005 J Y.
Adders Module M8.1 Section 6.2. Adders Half Adder Full Adder TTL Adder.
Combinatorial networks- II
What if Analysis. Goal Seek Command Formulas- consider different options by changing values= what if analysis Formulas- consider different options by.
Node Optimization. Simplification Represent each node in two level form Use espresso to minimize each node Several simplification procedures which vary.
XDI RDF Cell Graphs V This document introduces a notation for graphing XDI RDF statements called cell graphing. The motivation is to have an.
1 General Structural Equation (LISREL) Models Week 3 #2 A.Multiple Group Models with > 2 groups B.Relationship to ANOVA, ANCOVA models C.Introduction to.
Electronic Component Functions What is this component doing my in electronic device?
Presentation transcript:

Inside the binary adder

Electro-mechanical relay A solid state relay is a switch that is controlled by a current. When current flows from A to B, the circuit C-D is closed: The relay does not contain any transistors or other semi-conductor technology. No current between A and B Relay is open Current between A and B Relay is closed

Electro-mechanical relay The relays I used had 4 connections. If one of the 4 circuits A1-B1, A2-B2, A3-B3, A4-B4 is closed, the independant circuits C1-D1, C2- D2, C3-D3, C4-D4 will be closed. When the circuit was open, independant circtuis C1-E1, C2-E2, C3- E3, C4-E4 were closed. If you dont have this type of relay, you can simply use 4x the number of required relays.

Switch The switches I used for the project also had 4 independant connections. When the switch is off, the circuits C1-E1, C2-E2, C3-E3, C4-E4 are closed. When the switch is on, the circuits C1-D1, C2-D2, C3-D3, C4- D4 are closed. If you dont have this type of switch, you will need to add relays (or solder 4 switches together).

Circuit The switches are used to input the binary number to the adder. My adder had 8 input switches (4 bits per number). Relays are used to store the remainder (3 relay). Leds are used to display the result (5 leds). Binary addition table: The table contains 8 possibilites. The various interconnections between the switches and relays will handle these 8 cases. ABR RL

Circuit The following circuit illustrates a basic A+B+R block. Such a block needs to be created for each bit (4 in my case). Given my component choice and DC current supply, I only needed resistors for the LEDs. The relay I used required quit some current. I used a transformer from an old appliance.

ABR RL