SPM system block diagram M67 Floating DSP board (PCI bus) 1 plug-in board with 16 ADCs and 16 DACs 16 bits resolution 32 Digital lines Dulcinea electronic unit 7 low noise high voltage amplifiers (±150V/0-150) X,-X,Y,-Y,Z,-Z, tip Bias voltage Serial 1kHz-1MHz tapping unit, 10 mHz resolution PC compatible CPU Variablegain amplifiers plus offset for input lines AFM/STM head Chasis Optical system for laser beam detection Cantilever holder Piezoelectric scanner

High voltage board 16 bits resolution DAC line from DSP (±10V) gain selector (256 different possible values) 16 bits resolution DAC line from DSP (±10V) 10 Hz low pass filter 15 gain + To piezolectric Similar block diagram for x,y,z - To piezolectric Offset signal

Dynamic Board (lock-in) AmplitudeDriving signal Ocillator  A 0 sin(  t+  ) A sin(  t) (0º) A cos(  t) 90º Low pass filter Gain out Low pass filter Gain out Gain in G·A i sin(  t+  ) Out x Out y G T A·A i sin(  ) G T A·A i cos(  ) A i sin(  t+  ) To head

Dynamic board with phase lock loop (PLL) AmplitudeDriving signal Ocillator  A 0 sin(  t+  ) A sin(  t) (0º) A cos(  t) 90º Low pass filter Gain Low pass filter Gain out Gain in A i sin(  t+  ) A·A i sin(  ) PID G·A i sin(  t+  ) Out x    G T A·A i cos(  ) To head