Instrumentation B asic S kills in E lectricity and E lectronics Sixth Edition Lab 3 Introduction to the Logic Probe ©2003 Glencoe/McGraw-Hill Charles.

Slides:



Advertisements
Similar presentations
Un percorso realizzato da Mario Malizia
Advertisements

Extra Credit Challenge III Chapter 18 How it works Your group is your own table If you participate and avoid disqualification, you automatically get.
Artrelle Fragher & Robert walker. 1 you look for the median 1 you look for the median 2 then you look for the min and max 2 then you look for the min.
Fill in missing numbers or operations
Musical Sounds Physical Science101 Chapter twenty Amanda Hyer.
Ozone Level ppb (parts per billion)
Principles & Applications Small-Signal Amplifiers
Multiplication X 1 1 x 1 = 1 2 x 1 = 2 3 x 1 = 3 4 x 1 = 4 5 x 1 = 5 6 x 1 = 6 7 x 1 = 7 8 x 1 = 8 9 x 1 = 9 10 x 1 = x 1 = x 1 = 12 X 2 1.
Division ÷ 1 1 ÷ 1 = 1 2 ÷ 1 = 2 3 ÷ 1 = 3 4 ÷ 1 = 4 5 ÷ 1 = 5 6 ÷ 1 = 6 7 ÷ 1 = 7 8 ÷ 1 = 8 9 ÷ 1 = 9 10 ÷ 1 = ÷ 1 = ÷ 1 = 12 ÷ 2 2 ÷ 2 =
Graphing Linear Inequalities in Two Variables
Half Life. The half-life of a quantity whose value decreases with time is the interval required for the quantity to decay to half of its initial value.
1 1  1 =.
1  1 =.
Science Jeopardy >>>> Topic 1 Topic 2 Topic 4 Topic Topic 5.
Team 1 Team Guidelines Slide 1 – Numbers are hyperlinked to slides, you can edit the information on each slide – to include.
SOME TEXT GOES HERE PRESENTATIONNAM E By NAMESurname YourContact.
Filters and Enveloping - A Practical Discussion -
TIS Bus Connection Topology & Addresses Course 20 Minutes Test 10 Minutes TIS Training Program 2012, Rev 1.1
1January 18, 2006irk Rich Katz, Grunt Engineer NASA Office of Logic Design Some SEE Testing Considerations for the RTAX-S Series Devices.
Online Emergency Lighting Inverter Three Phase 3 KW KW.
Stand-By Emergency Lighting Inverter Three Phase 3 KW – 125 KW.
Unit 2: Supply, Demand, and Consumer Choice 1. REMEMBER THE STEPS! 2.
Least Common Multiple (LCM)
EXAMPLE 4 Solve a multi-step problem SHOPPING
Chapter 3 Basic Logic Gates 1.
Chapter 3 Logic Gates.
The scale of IC design Small-scale integrated, SSI: gate number usually less than 10 in a IC. Medium-scale integrated, MSI: gate number ~10-100, can operate.
Chapter 3 (part 1) Basic Logic Gates 1.
AUTO SELECTION OF ANY AVAILABLE PHASE,
Figure 3–1 Standard logic symbols for the inverter (ANSI/IEEE Std
Dyeing of acrylic /wool blends One bath method This method is suitable for producing light to medium-depth shades with basic dyes and acid, milling, or.
INVERTERS: The Investigation to the
Lighting concepts – Ballasts and Lighting Controls
© K.U.Leuven - ESAT/ELECTA Controlling HID lamps by intelligent power electronics Geert Deconinck, Peter Tant K.U.Leuven-ESAT 8 November 2007.
Money Math Review.
Marks out of 100 Mrs Smith’s Class Median Lower Quartile Upper Quartile Minimum Maximum.
Introduction to Indexes Rui Zhang The University of Melbourne Aug 2006.
Least Common Multiples and Greatest Common Factors
Panel II Efficient Court Administration SURVEY Commercial Enforcement and Insolvency Systems Legal Vice Presidency The World Bank.
Benjamin Banneker Charter Academy of Technology Making AYP Benjamin Banneker Charter Academy of Technology Making AYP.
N E FFECT AND S OCIAL F ACILITATION S TUDY DESIGN By Jacob Bradburn.
Making Numbers Two-digit numbers Three-digit numbers Click on the HOME button to return to this page at any time.
MathOnMonday® Presents: Building Math Courage® A program designed for Adults or Kids who have struggled to learn their Math in the traditional classroom!
Geometrical resampling S.Braccini, I.Ferrante, D.Passuello, O.Torre F.Antonucci, P.Astone, S.Frasca and C.Palomba.
SPATIAL DISCRIMINATION IN A T MAZE Trials to criterion BL/6 strain FVB strain ACQUISITION AND REVERSAL Day 1Day 2Day 3Day 4Day 5Day.
Number bonds to 10,
Beat the Computer Drill Divide 10s Becky Afghani, LBUSD Math Curriculum Office, 2004 Vertical Format.
2 x0 0 12/13/2014 Know Your Facts!. 2 x1 2 12/13/2014 Know Your Facts!
Powerpoint Jeopardy Category 1Category 2Category 3Category 4Category
Hardware word gecontroleerd… 50%. Hardware word gecontroleerd… 100% Done.
100 høyfrekvente ord på engelsk
Let’s Add! Click the cloud below for a secret question! Get Started!
Slides based on Kewal Saluja
B asic S kills in E lectricity and E lectronics Sixth Edition Ground Fault Circuit Interrupters ©2003 Glencoe/McGraw-Hill Charles A. Schuler.
Chapter 3 Basic Logic Gates 1.
Chapter 3 Basic Logic Gates
Welcome to the Real World. What to do ? Input from the mangonel sensors Input expected by the software.
TS 1.1 Basic Digital Troubleshooting 1 ©Paul Godin Updated August 2013 gmail.com.
Chapter 3 Basic Logic Gates William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River,
Electronics: Principles and Applications (Instrumentation Labs)
AND Gate Inputs Output Input A (Switch) Input B (Switch) Output Y (Lamp) 0 (Open) 0 (OFF) A B Lamp.
IC 4017 Pin Configuration And Application
Waveform 1.1 Basic Digital Waveform Parameters 1 Paul Godin Updated December 2014.
©2008 The McGraw-Hill Companies, Inc. All rights reserved. Digital Electronics Principles & Applications Seventh Edition Chapter 1 Digital Electronics.
Electronics: Principles and Applications (Instrumentation Labs)
Electronics: Principles and Applications Eighth Edition
Principles & Applications
Electronics: Principles and Applications Eighth Edition
JC Technology Logic Gates.
Digital Logic Experiment
Presentation transcript:

Instrumentation B asic S kills in E lectricity and E lectronics Sixth Edition Lab 3 Introduction to the Logic Probe ©2003 Glencoe/McGraw-Hill Charles A. Schuler

Lamp OFF … LOGIC LOWLamp ON … LOGIC HIGHLamp DIM … OPEN CIRCUIT (FLOATING) OR BAD LEVEL (Other brands of probes may differ)

HIGH LOW Digital logic levels as % of V SUPPLY HIGH TTLCMOS (5 V supply)(3 to 18 V supply) % of V SUPPLY UNDEFINED LOW = 1 = ON = ? = FLOATING = 0 = OFF

Common faults that can be detected with logic probes Open bond (floating output) Internal short (stuck high) Solder bridge (stuck low) Defective input

Logic probe with pulse memory (often used to catch “glitches”) 1. Set TTL/CMOS switch to family under test. 2. Place tip on circuit under test. 3. Press MEM/CLR (light goes out). 4. Light comes on when a single pulse (“glitch”) occurs.

Pulse trains cause the probe to flash at less than a 10 Hz rate even if the pulse frequency is much higher. (up to 80 MHz) This probe will “stretch” pulses as short as 10 ns and the lamp will flash.

Logic Probe Quiz When the lamp is off, the logic level isLOW When the lamp is on, the logic level isHIGH When the lamp is dim, the logic level isbad or floating When the lamp is flashing, the logic level isa pulse train A probe with pulse memory is useful when looking for glitches