Digital Logic Design Lecture 14 based on video from: https://www.youtube.com/watch?v=pQ3MfzqGlrc.

Slides:



Advertisements
Similar presentations
Abdullah Said Alkalbani University of Buraimi
Advertisements

Date of Birth Design Problem
Counters and Registers
CSE 370 Sample Final Exam Questions. 1) Logic Minimization CD AB F = Σm(0,6,7,8,9,11,15) + d(1,13)
- 1 - Using an SMT Solver and Craig Interpolation to Detect and Remove Redundant Linear Constraints in Representations of Non-Convex Polyhedra Christoph.
Principles & Applications
15 October 2013Birkbeck College, U. London1 Introduction to Computer Systems Lecturer: Steve Maybank Department of Computer Science and Information Systems.
A Simple ALU Binary Logic.
Princess Sumaya University
Introduction to CAFE Yu Hen Hu September 25, 2000.
Truth Tables & Logic Expressions
1 Yet More on Indexes Hash Tables Source: our textbook, slides by Hector Garcia-Molina.
Logic Circuits Basic Building Blocks Dr John Cowell
Karnaugh Map Adjacent Squares
Logic Gates. Transistors as Switches ¡V BB voltage controls whether the transistor conducts in a common base configuration. ¡Logic circuits can be built.
Digital Logic Design Gate-Level Minimization
Boolean Algebra and Logic Gates
Gate-Level Minimization
Logic Gates & Circuits. AND Gate Input AInput BOutput X AND Logic Gate AND Truth Table X = A. B AND Boolean Expression.
Module 3 Combinational and Sequential Logic Circuit By: Cesar Mendoza.
Chapter3: Gate-Level Minimization Part 2
Karnaugh Map Adjacent Squares
Topics Adders Half Adder Full Adder Subtracter Half Subtracter
CS 121 Digital Logic Design
CS1022 Computer Programming & Principles
CS 121 Digital Logic Design
CS 121 Digital Logic Design
Binary Lesson 3 Hexadecimal. Counting to 15 Base Base Base 16 Base Base Base 16 Two Ten (Hex) Two Ten (Hex)
Binary Lesson 3 Hexadecimal. Counting to 15 Base Base Base 16 Base Base Base 16 Two Ten (Hex) Two Ten (Hex)
CS 121 Digital Logic Design
Princess Sumaya University
Combinational Circuits
Digital Logic & Design Lecture No. 3. Number System Conversion Conversion between binary and octal can be carried out by inspection.  Each octal digit.
ENEE244-02xx Digital Logic Design Lecture 10. Announcements HW4 due 10/9 – Please omit last problem 4.6(a),(c) Quiz during recitation on Monday (10/13)
Datorteknik IntegerAddSub bild 1 Integer arithmetic Depends what you mean by "integer" Assume at 3-bit string. –Then we define zero = 000 one = 001 Use.
KU College of Engineering Elec 204: Digital Systems Design
Minimization of Circuits
Quine-McCluskey Method
ELECTRONICS TECHNOLOGY Digital Devices I Karnaugh Maps
Digital Logic Design Lecture 13. Announcements HW5 up on course webpage. Due on Tuesday, 10/21 in class. Upcoming: Exam on October 28. Will cover material.
Node Optimization. Simplification Represent each node in two level form Use espresso to minimize each node Several simplification procedures which vary.
FUNCTION OPTIMIZATION Switching Function Representations can be Classified in Terms of Levels Number of Levels, k, is Number of Unique Boolean (binary)
ENGIN112 L9: More Karnaugh Maps September 22, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 9 More Karnaugh Maps and Don’t Cares.
CSEE 4823 Advanced Logic Design Handout: Lecture #2 1/22/15
ECE 3110: Introduction to Digital Systems Simplifying Sum of Products using Karnaugh Maps.
Quine-McClusky Minimization Method Module M4.3 Section 5.3.
CS 151 Digital Systems Design Lecture 6 More Boolean Algebra A B.
Quine-McClusky Minimization Method Discussion D3.2.
ENEE244-02xx Digital Logic Design Lecture 7. Announcements Homework 3 due on Thursday. Review session will be held by Shang during class on Thursday.
Chapter 3. Minimization of Switching Functions. Given a sw function f(x 1, x 2, …, x n ) and some cost criteria, find a representation of f which minimizes.
Quine-McCluskey (Tabular) Minimization Two step process utilizing tabular listings to: Identify prime implicants (implicant tables) Identify minimal PI.
Two Level Networks. Two-Level Networks Slide 2 SOPs A function has, in general many SOPs Functions can be simplified using Boolean algebra Compare the.
Copyright © 2004 by Miguel A. Marin Revised McGILL UNIVERSITY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING COURSE ECSE DIGITAL SYSTEMS.
ENEE244-02xx Digital Logic Design Lecture 12. Announcements HW4 due today HW5 is up on course webpage. Due on 10/16. Recitation quiz on Monday, 10/13.
Digital Logic (Karnaugh Map). Karnaugh Maps Karnaugh maps (K-maps) are graphical representations of boolean functions. One map cell corresponds to a row.
CHAPTER 6 Quine-McCluskey Method
Lecture 6 Quine-McCluskey Method
3-7 Other Two-level Implementations
QUINE-McCLUSKEY METHOD
CS 352 Introduction to Logic Design
ECE 2110: Introduction to Digital Systems
ECE 331 – Digital System Design
SYEN 3330 Digital Systems Chapter 2 – Part 5 SYEN 3330 Digital Systems.
Quine-McClusky Minimization Method
SYEN 3330 Digital Systems Chapter 2 – Part 6 SYEN 3330 Digital Systems.
ECB2212-Digital Electronics
Minimization of Switching Functions
CHAPTER 6 QUINE-McCLUSKEY METHOD
ECE 331 – Digital System Design
Presentation transcript:

Digital Logic Design Lecture 14 based on video from:

Announcements HW5 due on 10/21 Quiz during recitation on Monday, 10/20. Upcoming: Midterm on Tuesday, 10/28.

Agenda Last time: – Minimal expressions for incomplete Boolean functions (4.6) – 5 and 6 variable K-Maps (4.7) – Petrick’s method of determining irredundant expressions (4.9) This time: – Quine-McCluskey method (4.8) – Prime Implicant Table Reductions (4.10) – The Multiple Output Simplification Problem (4.12)

Tabular Representations

Prime Implicants

Prime Implicants MintermXYZF

Finding Prime Implicants Step Step 2 (2,6)10 (4,5)10 (4,6)10 (5,7)11 (6,7)11 Step 3 (4,5,6,7)1 (4,6,5,7)1 All unchecked entries are Prime Implicants

Prime Implicants MintermXYZF

Essential Prime Implicants Find the Essential Prime Implicants using Quine- McClusky

Essential Prime Implicants minterms

Finding Prime Implicants (0,1)000 (0,2)000 (0,8)000 (1,3)001 (1,5)001 (2,3)001 (2,10)010 (8,10)100 (3,7)011 (5,7)011 (10,14)110 (7,15)111 (14,15)111 (0,1,2,3)00 (0,2,1,3)00 (0,2,8,10)00 (0,8,2,10)00 (1,3,5,7)01 (1,5,3,7)01

Find Essential Prime Implicants Prime Implicant Covered Minterms ,14XX 7,15XX 14,15XX 0,1,2,3XXXX 0,2,8,10XXXX 1,3,5,7XXXX Minterms

3 Prime Implicants

3 Prime Implicants

Column and Row Reductions

Example AX BXXX CXXX DXXX EXX FX GXX HXX IXX

Cost AX4 BXXX4 CXXX4 DXXX4 EXX4 FX5 GXX5 HXX5 IXX5 Cost is 1 plus number of literals in the term

Example Cost AX4 BXXX4 CXXX4 DXXX4 EXX4 FX5 GXX5 HXX5 IXX5

Example Cost AX4 BXXX4 CXXX4 DXXX4 EXX4 FX5 GXX5 HXX5 IXX5

Example Cost AX4 BXX4 CXX4 DXXX4 EX4 FX5 GXX5 HXX5 IXX5

Example Cost AX4 BXX4 CXX4 DXXX4 EX4 FX5 GXX5 HXX5 IXX5 Dominated rows: A is dominated by B since B has X’s in all columns in which A has X’s and B has at least one more X. Which rows dominate E and F?

Example Cost BXX4 CXX4 DXXX4 GXX5 HXX5 IXX5 Delete rows A, E, F since dominated row has cost equal to its dominating row. Why is this ok?

Example Cost **BXX4 CXX4 **DXXX4 **GXX5 HXX5 IXX5

Example Cost HX5 IX5 Can select either H or I since they both have the same cost. Final minimal cover is either: B,D,G,H B,D,G,I Note: Unlike Petrick’s method, not all minimal covers are necessarily obtained.

Summary: Prime Implicant Selection Procedure 1.Find all essential prime implicants. Rule a line through the essential rows and all columns which have an X in an essential row. 2.Rule a line through all dominating columns and dominated rows, keeping in mind the cost restriction for deleting rows. 3.Check to see if any unruled column has a single X. If there are no such columns, then the table is cyclic. If there are some columns with a single X, place a double asterisk next to the rows in which these X’s appear. These are called secondary essential rows. Rule a line through each secondary essential row and each column in which an X appears in a secondary essential row. 4.If all columns are ruled out, then the minimal sum is given by the sum of all the prime implicants which are associated with rows that have asterisks next to them. If all columns are not ruled out, then repeat Steps 2 and 3 until either there are no columns to be ruled or a cyclic table results. 5.If a cyclic table results, then Petrick’s method is applied to the cyclic table and a minimal cover is obtained for it. The sum of all prime implicants that are marked with asterisks plus the prime implicants for the minimal cover of the cyclic table as determined by Petrick’s method is a minimal sum.

Multiple Output Minimal Sums and Products

The Multiple-Output Simplification Problem

Naïve Approach Construct a minimal expression for each output function independently of the others. Example: XYZ

Naïve Approach

A More Economical Realization

Pitfalls of Naïve Approach

Naïve Approach: Better Approach: